Automatic generation of assertions from system level design using data mining

Lingyi Liu, David Sheridan, Viraj Athavale, Shobha Vasudevan

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

System level modeling is widely employed at early stages of system development for simplifying design verification and architectural exploration. Assertion based verification has become a well established part of RTL verification methodology. In the traditional assertion based verification flow, assertions are manually written. In this paper, we generate assertions from system level designs using GoldMine, an automatic assertion generation engine that uses data mining and static analysis. Candidate assertions are mined in the form of frequent patterns in the simulation traces of the system level designs. We consider both cycle accurate and transaction level designs and develop a methodology for the mining of each. For cycle accurate designs, we use both a decision tree based supervised learning algorithms as well as a coverage guided association mining algorithm to search for correlations in the simulation trace. For transaction level designs, sequential pattern mining is applied to generate frequent sequences of function calls and events from traces. We also use a symbolic execution engine to generalize the parameters and return values of the functions to help the data miner find relevant behavior. We show that our technique generates meaningful assertions on both a cycle accurate RISC CPU design and a transaction level AMBA-based DMA controller.

Original languageEnglish (US)
Title of host publication9th ACM/IEEE International Conference on Formal Methods and Models for Codesign, MEMOCODE 2011
Pages191-200
Number of pages10
DOIs
StatePublished - Sep 1 2011
Event9th ACM/IEEE International Conference on Formal Methods and Models for Codesign, MEMOCODE 2011 - Cambridge, United Kingdom
Duration: Jul 11 2011Jul 13 2011

Publication series

Name9th ACM/IEEE International Conference on Formal Methods and Models for Codesign, MEMOCODE 2011

Other

Other9th ACM/IEEE International Conference on Formal Methods and Models for Codesign, MEMOCODE 2011
CountryUnited Kingdom
CityCambridge
Period7/11/117/13/11

ASJC Scopus subject areas

  • Computational Theory and Mathematics
  • Modeling and Simulation

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    Liu, L., Sheridan, D., Athavale, V., & Vasudevan, S. (2011). Automatic generation of assertions from system level design using data mining. In 9th ACM/IEEE International Conference on Formal Methods and Models for Codesign, MEMOCODE 2011 (pp. 191-200). [5970526] (9th ACM/IEEE International Conference on Formal Methods and Models for Codesign, MEMOCODE 2011). https://doi.org/10.1109/MEMCOD.2011.5970526