Author retrospective AEGIS: Architecture for tamper-evident and tamper-resistant processing

G. Edward Suh, Christopher Fletcher, Dwaine Clarke, Blaise Gassend, Marten Van Dijk, Srinivas Devadas

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

AEGIS is a single-chip secure processor that can be used to protect the integrity and confidentiality of an application program from both physical and software attacks. We briey describe the history behind this architecture and its key features, discuss main observations and lessons from the project, and list limitations of AEGIS and how recent research addresses them. Copyright

Original languageEnglish (US)
Title of host publicationICS 2014 - Proceedings of the 28th ACM InternationaI Conference on Supercomputing
EditorsUtpal Banerjee
PublisherAssociation for Computing Machinery
Pages68-70
Number of pages3
ISBN (Electronic)9781450328401
DOIs
StatePublished - Jun 10 2014
Externally publishedYes
Event25th ACM International Conference on Supercomputing, ICS 2014 - Munich, Germany
Duration: Jun 10 2014Jun 13 2014

Publication series

NameProceedings of the International Conference on Supercomputing

Other

Other25th ACM International Conference on Supercomputing, ICS 2014
Country/TerritoryGermany
CityMunich
Period6/10/146/13/14

Keywords

  • Certified execution
  • Secure processors
  • Software licensing

ASJC Scopus subject areas

  • Computer Science(all)

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