Asymmetric Interleaving in Low-Voltage CMOS Power Management with Multiple Supply Rails

Marcel Schuck, Aaron D. Ho, Robert C.N. Pilawa-Podgurski

Research output: Contribution to journalArticlepeer-review


This paper presents a technique for reducing the input current ripple on multiphase power converters that provide multiple heterogeneous power supply rails, such as those present in portable electronics and computers. Through asymmetric interleaving of individual phases, the input current ripple can be reduced compared to conventional interleaving. The technique is derived based on an analytic description of the relevant current waveforms. Practical requirements of a digital control implementation of the proposed technique are analyzed, and its possible performance improvement is quantified through simulations and experimental results. With the proposed technique, close to a 3x reduction in input current ripple, compared to conventional methods, is demonstrated using an experimental prototype comprising a microcontroller that controls a multiphase 180 nm CMOS power management IC.

Original languageEnglish (US)
Article number7407646
Pages (from-to)715-722
Number of pages8
JournalIEEE Transactions on Power Electronics
Issue number1
StatePublished - Jan 2017


  • Asymmetric operation
  • Ripple minimization
  • harmonic elimination
  • low-voltage CMOS
  • multiphase converter

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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