Assertion Ranking using RTL Source Code Analysis

Debjit Pal, Spencer Offenberger, Shobha Vasudevan

Research output: Contribution to journalArticle

Abstract

We present a systematic and efficient ranking method to quantify the goodness of an assertion. We model dependencies among design variables as a directed graph called a variable dependency graph. We define assertion importance and assertion complexity metrics and use the dependency graph to algorithmically compute those two metrics. We repurpose an assertion coverage algorithm from the literature to form a statement-coverage-based ranking as our baseline. We compare our assertion ranking both qualitatively and quantitatively to this baseline. We demonstrate that our ranking is computationally more efficient than statement-coverage-based ranking and takes up to 4366× less computation time. We identify the potential design intents that each ranking prioritizes. We also discuss at length the effect of those prioritizations on the rank agreement and the bug detection ability of the top-ranked assertions according to the two rankings. Finally, we provide a comprehensive ranking for a set of assertions by combining our ranking and the statement-coverage-based ranking.

Fingerprint

Directed graphs

Keywords

  • Assertion ranking
  • Comprehensive ranking.
  • Debugging and localization
  • Variable dependency graph

ASJC Scopus subject areas

  • Software
  • Computer Graphics and Computer-Aided Design
  • Electrical and Electronic Engineering

Cite this

Assertion Ranking using RTL Source Code Analysis. / Pal, Debjit; Offenberger, Spencer; Vasudevan, Shobha.

In: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 01.01.2019.

Research output: Contribution to journalArticle

@article{b60a5b8d571c4bdfad58806c956a4e67,
title = "Assertion Ranking using RTL Source Code Analysis",
abstract = "We present a systematic and efficient ranking method to quantify the goodness of an assertion. We model dependencies among design variables as a directed graph called a variable dependency graph. We define assertion importance and assertion complexity metrics and use the dependency graph to algorithmically compute those two metrics. We repurpose an assertion coverage algorithm from the literature to form a statement-coverage-based ranking as our baseline. We compare our assertion ranking both qualitatively and quantitatively to this baseline. We demonstrate that our ranking is computationally more efficient than statement-coverage-based ranking and takes up to 4366× less computation time. We identify the potential design intents that each ranking prioritizes. We also discuss at length the effect of those prioritizations on the rank agreement and the bug detection ability of the top-ranked assertions according to the two rankings. Finally, we provide a comprehensive ranking for a set of assertions by combining our ranking and the statement-coverage-based ranking.",
keywords = "Assertion ranking, Comprehensive ranking., Debugging and localization, Variable dependency graph",
author = "Debjit Pal and Spencer Offenberger and Shobha Vasudevan",
year = "2019",
month = "1",
day = "1",
doi = "10.1109/TCAD.2019.2921374",
language = "English (US)",
journal = "IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems",
issn = "0278-0070",
publisher = "Institute of Electrical and Electronics Engineers Inc.",

}

TY - JOUR

T1 - Assertion Ranking using RTL Source Code Analysis

AU - Pal, Debjit

AU - Offenberger, Spencer

AU - Vasudevan, Shobha

PY - 2019/1/1

Y1 - 2019/1/1

N2 - We present a systematic and efficient ranking method to quantify the goodness of an assertion. We model dependencies among design variables as a directed graph called a variable dependency graph. We define assertion importance and assertion complexity metrics and use the dependency graph to algorithmically compute those two metrics. We repurpose an assertion coverage algorithm from the literature to form a statement-coverage-based ranking as our baseline. We compare our assertion ranking both qualitatively and quantitatively to this baseline. We demonstrate that our ranking is computationally more efficient than statement-coverage-based ranking and takes up to 4366× less computation time. We identify the potential design intents that each ranking prioritizes. We also discuss at length the effect of those prioritizations on the rank agreement and the bug detection ability of the top-ranked assertions according to the two rankings. Finally, we provide a comprehensive ranking for a set of assertions by combining our ranking and the statement-coverage-based ranking.

AB - We present a systematic and efficient ranking method to quantify the goodness of an assertion. We model dependencies among design variables as a directed graph called a variable dependency graph. We define assertion importance and assertion complexity metrics and use the dependency graph to algorithmically compute those two metrics. We repurpose an assertion coverage algorithm from the literature to form a statement-coverage-based ranking as our baseline. We compare our assertion ranking both qualitatively and quantitatively to this baseline. We demonstrate that our ranking is computationally more efficient than statement-coverage-based ranking and takes up to 4366× less computation time. We identify the potential design intents that each ranking prioritizes. We also discuss at length the effect of those prioritizations on the rank agreement and the bug detection ability of the top-ranked assertions according to the two rankings. Finally, we provide a comprehensive ranking for a set of assertions by combining our ranking and the statement-coverage-based ranking.

KW - Assertion ranking

KW - Comprehensive ranking.

KW - Debugging and localization

KW - Variable dependency graph

UR - http://www.scopus.com/inward/record.url?scp=85067011053&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=85067011053&partnerID=8YFLogxK

U2 - 10.1109/TCAD.2019.2921374

DO - 10.1109/TCAD.2019.2921374

M3 - Article

AN - SCOPUS:85067011053

JO - IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

JF - IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

SN - 0278-0070

ER -