An algorithm that solves a general array-optimization problem is presented. The algorithm can be used for compacting gate matrix layouts, SLAs, Weinberger arrays, and for multiple folding of PLAs. The approach is based on the technique of simulated annealing. The solution space is formulated such that it facilitates an effective search for an optimal solution. Experimental results are very encouraging.
|Original language||English (US)|
|Title of host publication||Proceedings - Design Automation Conference|
|Number of pages||7|
|ISBN (Print)||0818607815, 9780818607813|
|State||Published - 1987|
|Name||Proceedings - Design Automation Conference|
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