TY - GEN
T1 - Area and energy-efficient crosstalk avoidance codes for on-chip buses
AU - Sridhara, Srinivasa R.
AU - Ahmed, Arshad
AU - Shanbhag, Naresh R.
PY - 2004
Y1 - 2004
N2 - Capacitive crosstalk between adjacent wires in long on-chip buses significantly increases propagation delay in the deep submicron regime. A high-speed bus can be designed by eliminating crosstalk delay through bus encoding. In this paper, we present an overview of the existing coding schemes and show that they require either a large wiring overhead or complex encoder-decoder circuits. We propose a family of codes referred to as overlapping codes that reduce both overheads. We construct two codes from this family and demonstrate their superiority over existing schemes in terms of area and energy dissipation. Specifically, for a 1-cm 32-bit bus in 0.13-μm CMOS technology, we present a 48-wire solution that has 1.98 × speed-up, 10% energy savings and requires 20% less area than shielding.
AB - Capacitive crosstalk between adjacent wires in long on-chip buses significantly increases propagation delay in the deep submicron regime. A high-speed bus can be designed by eliminating crosstalk delay through bus encoding. In this paper, we present an overview of the existing coding schemes and show that they require either a large wiring overhead or complex encoder-decoder circuits. We propose a family of codes referred to as overlapping codes that reduce both overheads. We construct two codes from this family and demonstrate their superiority over existing schemes in terms of area and energy dissipation. Specifically, for a 1-cm 32-bit bus in 0.13-μm CMOS technology, we present a 48-wire solution that has 1.98 × speed-up, 10% energy savings and requires 20% less area than shielding.
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U2 - 10.1109/ICCD.2004.1347891
DO - 10.1109/ICCD.2004.1347891
M3 - Conference contribution
AN - SCOPUS:17644367223
SN - 0769522319
T3 - Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors
SP - 12
EP - 17
BT - Proceedings - IEEE International Conference on Computer Design
T2 - Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors, ICCD 2004
Y2 - 11 October 2004 through 13 October 2004
ER -