Architectural support for compiler-synthesized dynamic branch prediction strategies: Rationale and initial results

David I. August, Daniel A. Connors, John C. Gyllenhaal, Wen-Mei W Hwu

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

This paper introduces a new architectural approach that supports compiler-synthesized dynamic branch predication. In compiler-synthesized dynamic branch prediction, the compiler generates code sequences that, when executed, digest relevant state information and execution statistics into a condition bit, or predicate. The hardware then utilizes this information to make predictions. Two categories of such architectures are proposed and evaluated. In Predicate Only Prediction (POP), the hardware simply uses the condition generated by the code sequence as a prediction. In Predicate Enhanced Prediction (PEP), the hardware uses the generated condition to enhance the accuracy of conventional branch prediction hardware. The IMPACT compiler currently provides a minimal level of compiler support for the proposed approach. Experiments based on current predicated code show that the proposed predictors achieve better performance than conventional branch predictors. Furthermore, they enable future compiler techniques which have the potential to achieve extremely high branch prediction accuracies. Several such compiler techniques are proposed in this paper.

Original languageEnglish (US)
Title of host publicationIEEE High-Performance Computer Architecture Symposium Proceedings
Editors Anon
PublisherIEEE
Pages84-93
Number of pages10
StatePublished - 1997
EventProceedings of the 1997 3rd International Symposium on High-Performance Computer Architecture, HPCA - San Antonio, TX, USA
Duration: Feb 1 1997Feb 5 1997

Other

OtherProceedings of the 1997 3rd International Symposium on High-Performance Computer Architecture, HPCA
CitySan Antonio, TX, USA
Period2/1/972/5/97

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Hardware
Statistics
Experiments

ASJC Scopus subject areas

  • Hardware and Architecture

Cite this

August, D. I., Connors, D. A., Gyllenhaal, J. C., & Hwu, W-M. W. (1997). Architectural support for compiler-synthesized dynamic branch prediction strategies: Rationale and initial results. In Anon (Ed.), IEEE High-Performance Computer Architecture Symposium Proceedings (pp. 84-93). IEEE.

Architectural support for compiler-synthesized dynamic branch prediction strategies : Rationale and initial results. / August, David I.; Connors, Daniel A.; Gyllenhaal, John C.; Hwu, Wen-Mei W.

IEEE High-Performance Computer Architecture Symposium Proceedings. ed. / Anon. IEEE, 1997. p. 84-93.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

August, DI, Connors, DA, Gyllenhaal, JC & Hwu, W-MW 1997, Architectural support for compiler-synthesized dynamic branch prediction strategies: Rationale and initial results. in Anon (ed.), IEEE High-Performance Computer Architecture Symposium Proceedings. IEEE, pp. 84-93, Proceedings of the 1997 3rd International Symposium on High-Performance Computer Architecture, HPCA, San Antonio, TX, USA, 2/1/97.
August DI, Connors DA, Gyllenhaal JC, Hwu W-MW. Architectural support for compiler-synthesized dynamic branch prediction strategies: Rationale and initial results. In Anon, editor, IEEE High-Performance Computer Architecture Symposium Proceedings. IEEE. 1997. p. 84-93
August, David I. ; Connors, Daniel A. ; Gyllenhaal, John C. ; Hwu, Wen-Mei W. / Architectural support for compiler-synthesized dynamic branch prediction strategies : Rationale and initial results. IEEE High-Performance Computer Architecture Symposium Proceedings. editor / Anon. IEEE, 1997. pp. 84-93
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