Approach towards benchmarking of fault-tolerant commercial systems

Timothy K. Tsai, Ravishankar K. Iyer, Doug Jewitt

Research output: Contribution to journalConference articlepeer-review

Abstract

This paper presents a benchmark for dependable systems. The benchmark consists of two metrics, number of catastrophic incidents and performance degradation, which are obtained by a tool that (1) generates synthetic workloads that produce a high level of CPU, memory, and I/O activity and (2) injects CPU, memory, and I/O faults according to an injection strategy. The benchmark has been installed on two TMR-based prototype machines: TMR Prototype A and TMR Prototype B. An implementation for a third prototype, is based on a duplex architecture, is in progress. The results demonstrate the utility of the benchmark in comparing the system-level fault tolerance of these machines and in providing insight into their design. In particular, the benchmark shows that Prototype B suffers fewer catastrophic incidents than Prototype A under the same workload conditions and fault injection method. However, Prototype B also suffers more performance degradation in the presence of faults, which might be an important concern for time-critical applications.

Original languageEnglish (US)
Pages (from-to)314-323
Number of pages10
JournalProceedings - Annual International Conference on Fault-Tolerant Computing
StatePublished - 1996
EventProceedings of the 1996 26th International Symposium on Fault-Tolerant Computing - Sendai, Jpn
Duration: Jun 25 1996Jun 27 1996

ASJC Scopus subject areas

  • Hardware and Architecture

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