TY - GEN
T1 - Application of the latency insertion method (LIM) to the modeling of CDM ESD events
AU - Klokotov, Dmitri
AU - Shukla, Vrashank
AU - Schutt-Ainé, José
AU - Rosenbaum, Elyse
PY - 2010
Y1 - 2010
N2 - In this paper, the application of the latency insertion method (LIM) to the analysis of charged device model (CDM) electrostatic discharge (ESD) events in integrated circuits (ICs) is discussed. LIM is proposed as an alternative to existing techniques commonly used for chip-level circuit simulation of CDM ESD. Such simulators, based on the modified nodal analysis (MNA) method, can underperform in cases that require very large model sizes. LIM was developed specifically for the analysis of fast transient phenomena in very large networks and is more robust and less resourcehungry than conventional methods.
AB - In this paper, the application of the latency insertion method (LIM) to the analysis of charged device model (CDM) electrostatic discharge (ESD) events in integrated circuits (ICs) is discussed. LIM is proposed as an alternative to existing techniques commonly used for chip-level circuit simulation of CDM ESD. Such simulators, based on the modified nodal analysis (MNA) method, can underperform in cases that require very large model sizes. LIM was developed specifically for the analysis of fast transient phenomena in very large networks and is more robust and less resourcehungry than conventional methods.
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U2 - 10.1109/ECTC.2010.5490800
DO - 10.1109/ECTC.2010.5490800
M3 - Conference contribution
AN - SCOPUS:77955212810
SN - 9781424464104
T3 - Proceedings - Electronic Components and Technology Conference
SP - 652
EP - 656
BT - 2010 Proceedings 60th Electronic Components and Technology Conference, ECTC 2010
T2 - 60th Electronic Components and Technology Conference, ECTC 2010
Y2 - 1 June 2010 through 4 June 2010
ER -