Application of the latency insertion method (LIM) to the modeling of CDM ESD events

Dmitri Klokotov, Vrashank Shukla, José Schutt-Ainé, Elyse Rosenbaum

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

In this paper, the application of the latency insertion method (LIM) to the analysis of charged device model (CDM) electrostatic discharge (ESD) events in integrated circuits (ICs) is discussed. LIM is proposed as an alternative to existing techniques commonly used for chip-level circuit simulation of CDM ESD. Such simulators, based on the modified nodal analysis (MNA) method, can underperform in cases that require very large model sizes. LIM was developed specifically for the analysis of fast transient phenomena in very large networks and is more robust and less resourcehungry than conventional methods.

Original languageEnglish (US)
Title of host publication2010 Proceedings 60th Electronic Components and Technology Conference, ECTC 2010
Pages652-656
Number of pages5
DOIs
StatePublished - Aug 9 2010
Event60th Electronic Components and Technology Conference, ECTC 2010 - Las Vegas, NV, United States
Duration: Jun 1 2010Jun 4 2010

Publication series

NameProceedings - Electronic Components and Technology Conference
ISSN (Print)0569-5503

Other

Other60th Electronic Components and Technology Conference, ECTC 2010
CountryUnited States
CityLas Vegas, NV
Period6/1/106/4/10

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

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