Application of compiler-assisted multiple-instruction retry to VLIW architectures

Shyh Kwei Chen, W. Kent Fuchs, Wen-Mei W Hwu

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Two compiler-assisted multiple-instruction word retry schemes for very long instruction word (VLIW) architectures are described. The first scheme compacts the compiler-generated hazard-free code with different degrees of rollback capability for scalar processors [14], and inserts no-ops in the scheduled code words. The second scheme employs a hardware read buffer [2] to resolve frequently occurring data hazards, and utilizes the compiler to resolve the remaining hazards.

Original languageEnglish (US)
Title of host publicationProceedings of the Conference on Fault-Tolerant Parallel and Distributed Systems
PublisherIEEE
Pages51-58
Number of pages8
StatePublished - 1995
EventProceedings of the 1995 Fault-Tolerant Parallel and Distributed Systems - Galveston, TX, USA
Duration: Jun 13 1994Jun 14 1994

Other

OtherProceedings of the 1995 Fault-Tolerant Parallel and Distributed Systems
CityGalveston, TX, USA
Period6/13/946/14/94

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ASJC Scopus subject areas

  • Computer Science(all)

Cite this

Chen, S. K., Fuchs, W. K., & Hwu, W-M. W. (1995). Application of compiler-assisted multiple-instruction retry to VLIW architectures. In Proceedings of the Conference on Fault-Tolerant Parallel and Distributed Systems (pp. 51-58). IEEE.