### Abstract

A one-stage shuffle exchange network to be used as a processor-memory switch in a multiprocessor is described. The stochastic behavior of the network is studied under the assumption that any memory module is equally likely to be referenced. It is shown that under these assumptions the average number of passes through the network for an item of data to reach its destination can be made less than 2log//2N when N less than equivalent to 2**2**0 (N is the number of processors and memories). This can be achieved by using no more than four one-stage shuffle-exchange networks, each one consisting of N exchange elements.

Original language | English (US) |
---|---|

Pages (from-to) | 116-123 |

Number of pages | 8 |

Journal | Materials Engineering (Cleveland) |

State | Published - Jan 1 2017 |

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### ASJC Scopus subject areas

- Engineering(all)

### Cite this

*Materials Engineering (Cleveland)*, 116-123.

**ANALYSIS OF MESSAGE SWITCHING WITH SHUFFLE-EXCHANGES IN MULTIPROCESSORS.** / Lawrie, D. H.; Padua, D. A.

Research output: Contribution to journal › Article

*Materials Engineering (Cleveland)*, pp. 116-123.

}

TY - JOUR

T1 - ANALYSIS OF MESSAGE SWITCHING WITH SHUFFLE-EXCHANGES IN MULTIPROCESSORS.

AU - Lawrie, D. H.

AU - Padua, D. A.

PY - 2017/1/1

Y1 - 2017/1/1

N2 - A one-stage shuffle exchange network to be used as a processor-memory switch in a multiprocessor is described. The stochastic behavior of the network is studied under the assumption that any memory module is equally likely to be referenced. It is shown that under these assumptions the average number of passes through the network for an item of data to reach its destination can be made less than 2log//2N when N less than equivalent to 2**2**0 (N is the number of processors and memories). This can be achieved by using no more than four one-stage shuffle-exchange networks, each one consisting of N exchange elements.

AB - A one-stage shuffle exchange network to be used as a processor-memory switch in a multiprocessor is described. The stochastic behavior of the network is studied under the assumption that any memory module is equally likely to be referenced. It is shown that under these assumptions the average number of passes through the network for an item of data to reach its destination can be made less than 2log//2N when N less than equivalent to 2**2**0 (N is the number of processors and memories). This can be achieved by using no more than four one-stage shuffle-exchange networks, each one consisting of N exchange elements.

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UR - http://www.scopus.com/inward/citedby.url?scp=0019337346&partnerID=8YFLogxK

M3 - Article

AN - SCOPUS:0019337346

SP - 116

EP - 123

JO - Materials Engineering (Cleveland)

JF - Materials Engineering (Cleveland)

ER -