Analysis and optimization of I/O cache coherency strategies for SoC-FPGA device

Keyphrases

• FPGA Device 100%
• Cache Coherence 100%
• SoC FPGA 100%
• Heterogeneous SoC 40%
• Coherence Method 40%
• Hardware Accelerator 20%
• Tightly Coupled Integration 20%
• Efficient Communication 20%
• Data Transaction 20%
• PCIe 20%
• FPGA Platform 20%
• Xilinx 20%
• SoC Design 20%
• FPGA Acceleration 20%
• Data Access Pattern 20%
• Platform Support 20%
• Application Access 20%
• Accelerator Performance 20%
• SoC Platform 20%
• Zynq UltraScale+ 20%
• Transaction Behavior 20%

Computer Science

• Input/Output 100%
• Field Programmable Gate Arrays 100%
• System-on-Chip 100%
• Cache Coherence 66%
• Hardware Accelerator 16%
• Tight Integration 16%
• Transaction Data 16%
• Running Software 16%
• Data Access Pattern 16%
• Platform Support 16%
• Proposed Modification 16%
• Computer Hardware 16%