An optimal algorithm for floorplan area optimization

Ting Chi Wang, D. F. Wong

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

An optimal algorithm for the VLSI floorplan area optimization problem is presented. The algorithm is an extension of the technique described by L. Stockmeyer (Information and Control, Vol. 59, pp. 91-101, 1983). Experimental results indicate that this algorithm pruned a very large number of redundant implementations. In addition, since the algorithm basically exploits the geometric property of the topology of the given floorplan, it does not need to depend on the polar dual graphs to calculate the longest paths. Consequently, it is able to run more efficiently than the branch-and-bound algorithm.

Original languageEnglish (US)
Title of host publication27th ACM/IEEE Design Automation Conference. Proceedings 1990
PublisherPubl by IEEE
Pages180-186
Number of pages7
ISBN (Print)081869650X
DOIs
StatePublished - 1990
Externally publishedYes
Event27th ACM/IEEE Design Automation Conference - Orlando, FL, USA
Duration: Jun 24 1990Jun 28 1990

Publication series

Name27th ACM/IEEE Design Automation Conference. Proceedings 1990

Other

Other27th ACM/IEEE Design Automation Conference
CityOrlando, FL, USA
Period6/24/906/28/90

ASJC Scopus subject areas

  • Engineering(all)

Fingerprint Dive into the research topics of 'An optimal algorithm for floorplan area optimization'. Together they form a unique fingerprint.

  • Cite this

    Wang, T. C., & Wong, D. F. (1990). An optimal algorithm for floorplan area optimization. In 27th ACM/IEEE Design Automation Conference. Proceedings 1990 (pp. 180-186). (27th ACM/IEEE Design Automation Conference. Proceedings 1990). Publ by IEEE. https://doi.org/10.1145/123186.123253