An MRAM-based deep in-memory architecture for deep neural networks

Ameya D. Patil, Haocheng Hua, Sujan Gonugondla, Mingu Kang, Naresh R Shanbhag

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

This paper presents an MRAM-based deep in-memory architecture (MRAM-DIMA) to efficiently implement multi-bit matrix vector multiplication for deep neural networks using a standard MRAM bitcell array. The MRAM-DIMA achieves an 4.5× and 70× lower energy and delay, respectively, compared to a conventional digital MRAM architecture. Behavioral models are developed to estimate the impact of circuit non-idealities, including process variations, on the DNN accuracy. An accuracy drop of ≤ 0.5% (≤ 1%) is observed for LeNet-300-100 on the MNIST dataset (a 9-layer CNN on the CIFAR-10 dataset), while tolerating 24% (12%) variation in cell conductance in a commercial 22 nm CMOS-MRAM process.

Original languageEnglish (US)
Title of host publication2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019 - Proceedings
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781728103976
DOIs
StatePublished - Jan 1 2019
Event2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019 - Sapporo, Japan
Duration: May 26 2019May 29 2019

Publication series

NameProceedings - IEEE International Symposium on Circuits and Systems
Volume2019-May
ISSN (Print)0271-4310

Conference

Conference2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019
CountryJapan
CitySapporo
Period5/26/195/29/19

Fingerprint

Memory architecture
Networks (circuits)
Deep neural networks

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

Cite this

Patil, A. D., Hua, H., Gonugondla, S., Kang, M., & Shanbhag, N. R. (2019). An MRAM-based deep in-memory architecture for deep neural networks. In 2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019 - Proceedings [8702206] (Proceedings - IEEE International Symposium on Circuits and Systems; Vol. 2019-May). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ISCAS.2019.8702206

An MRAM-based deep in-memory architecture for deep neural networks. / Patil, Ameya D.; Hua, Haocheng; Gonugondla, Sujan; Kang, Mingu; Shanbhag, Naresh R.

2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019 - Proceedings. Institute of Electrical and Electronics Engineers Inc., 2019. 8702206 (Proceedings - IEEE International Symposium on Circuits and Systems; Vol. 2019-May).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Patil, AD, Hua, H, Gonugondla, S, Kang, M & Shanbhag, NR 2019, An MRAM-based deep in-memory architecture for deep neural networks. in 2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019 - Proceedings., 8702206, Proceedings - IEEE International Symposium on Circuits and Systems, vol. 2019-May, Institute of Electrical and Electronics Engineers Inc., 2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019, Sapporo, Japan, 5/26/19. https://doi.org/10.1109/ISCAS.2019.8702206
Patil AD, Hua H, Gonugondla S, Kang M, Shanbhag NR. An MRAM-based deep in-memory architecture for deep neural networks. In 2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019 - Proceedings. Institute of Electrical and Electronics Engineers Inc. 2019. 8702206. (Proceedings - IEEE International Symposium on Circuits and Systems). https://doi.org/10.1109/ISCAS.2019.8702206
Patil, Ameya D. ; Hua, Haocheng ; Gonugondla, Sujan ; Kang, Mingu ; Shanbhag, Naresh R. / An MRAM-based deep in-memory architecture for deep neural networks. 2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019 - Proceedings. Institute of Electrical and Electronics Engineers Inc., 2019. (Proceedings - IEEE International Symposium on Circuits and Systems).
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