An FPGA-based RNN-T inference accelerator with PIM-HBM

Keyphrases

• C + + 20%
• Compute-bound 20%
• Control Code 20%
• Controller 20%
• Device Driver 20%
• Direct Memory Access 20%
• Energy Efficiency Improvement 20%
• Execution Time 40%
• FP16 20%
• FPGA-based 100%
• Hardware Module 20%
• Hyperbolic Tangent 20%
• Inference Accelerator 100%
• LSTM Layer 20%
• Matrix-vector multiplication 20%
• MLPerf 20%
• Nonlinear Function 20%
• On-chip Memory 20%
• PCIe 20%
• Quantized Weight 20%
• Reconfiguration 20%
• Rectified Linear Unit (ReLU) 20%
• Recurrent Neural Network Transducer (RNN-T) 100%
• T-operation 20%

Computer Science

• Configuration Change 20%
• Device Driver 20%
• Direct Memory Access 20%
• Energy Efficiency 20%
• Execution Time 40%
• Hyperbolic Tangent 20%
• Long Short-Term Memory Network 20%
• Memory Command 20%
• Memory Controller 20%
• Nonlinear Function 20%
• Recurrent Neural Network 100%
• Vector Multiplication 20%
• Wise Operation 20%