An experimental study of soft errors in microprocessors

Giacinto P. Saggese; Nicholas J. Wang; Zbigniew T. Kalbarczyk; Sanjay J. Patel; Ravishankar K. Iyer

doi:10.1109/MM.2005.104

An experimental study of soft errors in microprocessors

Giacinto P. Saggese, Nicholas J. Wang, Zbigniew T. Kalbarczyk, Sanjay J. Patel, Ravishankar K. Iyer

Research output: Contribution to journal › Article › peer-review

Abstract

THE ISSUE OF SOFT ERRORS is AN IMPORTANT EMERGING CONCERN IN THE DESIGN AND IMPLEMENTATION OF FUTURE MICROPROCESSORS. THE AUTHORS EXAMINE THE IMPACT OF SOFT ERRORS ON TWO DIFFERENT MICROARCHITECTURES: A DLX PROCESSOR FOR EMBEDDED APPLICATIONS AND A HIGH-PERFORMANCE ALPHA PROCESSOR. THE RESULTS CONTRAST IMPACT OF SOFT ERRORS ON COMBINATIONAL AND SEQUENTIAL LOGIC, IDENTIFY THE MOST VULNERABLE UNITS, AND ASSESS SOFT ERROR IMPACT ON THE APPLICATION.

Original language	English (US)
Pages (from-to)	30-39
Number of pages	10
Journal	IEEE Micro
Volume	25
Issue number	6
DOIs	https://doi.org/10.1109/MM.2005.104
State	Published - Nov 2005

ASJC Scopus subject areas

Software
Hardware and Architecture
Electrical and Electronic Engineering

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10.1109/MM.2005.104

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title = "An experimental study of soft errors in microprocessors",

abstract = "THE ISSUE OF SOFT ERRORS is AN IMPORTANT EMERGING CONCERN IN THE DESIGN AND IMPLEMENTATION OF FUTURE MICROPROCESSORS. THE AUTHORS EXAMINE THE IMPACT OF SOFT ERRORS ON TWO DIFFERENT MICROARCHITECTURES: A DLX PROCESSOR FOR EMBEDDED APPLICATIONS AND A HIGH-PERFORMANCE ALPHA PROCESSOR. THE RESULTS CONTRAST IMPACT OF SOFT ERRORS ON COMBINATIONAL AND SEQUENTIAL LOGIC, IDENTIFY THE MOST VULNERABLE UNITS, AND ASSESS SOFT ERROR IMPACT ON THE APPLICATION.",

author = "Saggese, {Giacinto P.} and Wang, {Nicholas J.} and Kalbarczyk, {Zbigniew T.} and Patel, {Sanjay J.} and Iyer, {Ravishankar K.}",

note = "Funding Information: We thank Fran Baker for her careful reading of an earlier draft of this paper and Anoop Vetteth for his contribution in carrying out the experiments. This work was supported in part by NSF grant ACI 0121658 ITR/AP, MURI grant N00014-01-1-0576, Gigascale Systems Research Center (GSRC/Marco), the Center for Circuits and Systems Solutions (C2S2/Marco), and the team of students who helped construct the Alpha RTL model.",

year = "2005",

month = nov,

doi = "10.1109/MM.2005.104",

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volume = "25",

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AU - Patel, Sanjay J.

AU - Iyer, Ravishankar K.

N1 - Funding Information: We thank Fran Baker for her careful reading of an earlier draft of this paper and Anoop Vetteth for his contribution in carrying out the experiments. This work was supported in part by NSF grant ACI 0121658 ITR/AP, MURI grant N00014-01-1-0576, Gigascale Systems Research Center (GSRC/Marco), the Center for Circuits and Systems Solutions (C2S2/Marco), and the team of students who helped construct the Alpha RTL model.

PY - 2005/11

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N2 - THE ISSUE OF SOFT ERRORS is AN IMPORTANT EMERGING CONCERN IN THE DESIGN AND IMPLEMENTATION OF FUTURE MICROPROCESSORS. THE AUTHORS EXAMINE THE IMPACT OF SOFT ERRORS ON TWO DIFFERENT MICROARCHITECTURES: A DLX PROCESSOR FOR EMBEDDED APPLICATIONS AND A HIGH-PERFORMANCE ALPHA PROCESSOR. THE RESULTS CONTRAST IMPACT OF SOFT ERRORS ON COMBINATIONAL AND SEQUENTIAL LOGIC, IDENTIFY THE MOST VULNERABLE UNITS, AND ASSESS SOFT ERROR IMPACT ON THE APPLICATION.

AB - THE ISSUE OF SOFT ERRORS is AN IMPORTANT EMERGING CONCERN IN THE DESIGN AND IMPLEMENTATION OF FUTURE MICROPROCESSORS. THE AUTHORS EXAMINE THE IMPACT OF SOFT ERRORS ON TWO DIFFERENT MICROARCHITECTURES: A DLX PROCESSOR FOR EMBEDDED APPLICATIONS AND A HIGH-PERFORMANCE ALPHA PROCESSOR. THE RESULTS CONTRAST IMPACT OF SOFT ERRORS ON COMBINATIONAL AND SEQUENTIAL LOGIC, IDENTIFY THE MOST VULNERABLE UNITS, AND ASSESS SOFT ERROR IMPACT ON THE APPLICATION.

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JO - IEEE Micro

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An experimental study of soft errors in microprocessors

Abstract

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