An evaluation of vectorizing compilers

Saeed Maleki, Yaoqing Gao, María J. Garzarán, Tommy Wong, David A. Padua

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Most of today's processors include vector units that have been designed to speedup single threaded programs. Although vector instructions can deliver high performance, writing vector code in assembly language or using intrinsics in high level languages is a time consuming and error-prone task. The alternative is to automate the process of vectorization by using vectorizing compilers. This paper evaluates how well compilers vectorize a synthetic benchmark consisting of 151 loops, two application from Petascale Application Collaboration Teams (PACT), and eight applications from Media Bench II. We evaluated three compilers: GCC (version 4.7.0), ICC (version 12.0) and XLC (version 11.01). Our results show that despite all the work done in vectorization in the last 40 years 45-71% of the loops in the synthetic benchmark and only a few loops from the real applications are vectorized by the compilers we evaluated.

Original languageEnglish (US)
Title of host publicationProceedings - 2011 International Conference on Parallel Architectures and Compilation Techniques, PACT 2011
Pages372-382
Number of pages11
DOIs
StatePublished - Dec 1 2011
Event20th International Conference on Parallel Architectures and Compilation Techniques, PACT 2011 - Galveston, TX, United States
Duration: Oct 10 2011Oct 14 2011

Publication series

NameParallel Architectures and Compilation Techniques - Conference Proceedings, PACT
ISSN (Print)1089-795X

Other

Other20th International Conference on Parallel Architectures and Compilation Techniques, PACT 2011
CountryUnited States
CityGalveston, TX
Period10/10/1110/14/11

ASJC Scopus subject areas

  • Software
  • Theoretical Computer Science
  • Hardware and Architecture

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