@inproceedings{f11835c355cf42b380093e183e1ce42e,
title = "An energy-efficient memory-based high-throughput VLSI architecture for convolutional networks",
abstract = "In this paper, an energy efficient, memory-intensive, and high throughput VLSI architecture is proposed for convolutional networks (C-Net) by employing compute memory (CM) [1], where computation is deeply embedded into the memory (SRAM). Behavioral models incorporating CM's circuit non-idealities and energy models in 45nm SOI CMOS are presented. System-level simulations using these models demonstrate that the probability of handwritten digit recognition Pr > 0.99 can be achieved using the MNIST database [2], along with a 24.5× reduced energy delay product, a 5.0× reduced energy, and a 4.9× higher throughput as compared to the conventional system.",
keywords = "Compute memory, Convolutional networks, Machine learning, Pattern recognition",
author = "Mingu Kang and Gonugondla, {Sujan K.} and Keel, {Min Sun} and Shanbhag, {Naresh R.}",
year = "2015",
month = aug,
day = "4",
doi = "10.1109/ICASSP.2015.7178127",
language = "English (US)",
series = "ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing - Proceedings",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
pages = "1037--1041",
booktitle = "2015 IEEE International Conference on Acoustics, Speech, and Signal Processing, ICASSP 2015 - Proceedings",
address = "United States",
note = "40th IEEE International Conference on Acoustics, Speech, and Signal Processing, ICASSP 2015 ; Conference date: 19-04-2014 Through 24-04-2014",
}