An efficient algorithm for communication-based task mapping

Eduardo H.M. Cruz, Matthias Diener, Laércio L. Pilla, Philippe O.A. Navaux

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

The communication between tasks of a parallel application is an important characteristic to consider when mapping tasks to computing cores due to possible differences in communication performance. Within a machine, performance differences are introduced by the memory hierarchy, in which cache memories can be shared by groups of cores and intrachip interconnections are faster than inter-chip interconnections. In cluster and grid systems, the network imposes an additional communication latency. By mapping tasks that communicate to cores nearby on the memory hierarchy, or to the same nodes in clusters or grids, the communication of parallel applications is optimized, leading to increased performance and energy efficiency. In the task mapping context, one of the most important aspects to be considered is the mapping algorithm, as it determines the improvements that can be achieved. Since the problem of finding the best mapping is NP-Hard, heuristics must be employed to find an approximate solution in feasible time. In this paper, we present EagerMap, a new algorithm to perform communication-based mapping that is based on a greedy grouping strategy applied hierarchically. Experimental evaluation indicates that the execution time of our algorithm is 10 times faster than the state-of-the-art, and presents higher performance improvements. Due to its low execution time and high stability, EagerMap is also suitable for online task mapping, where tasks are migrated during execution.

Original languageEnglish (US)
Title of host publicationProceedings - 23rd Euromicro International Conference on Parallel, Distributed, and Network-Based Processing, PDP 2015
EditorsJohan Lilius, Masoud Daneshtalab, Mats Brorsson, Ville Leppanen, Marco Aldinucci
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages207-214
Number of pages8
ISBN (Electronic)9781479984909
DOIs
StatePublished - 2015
Externally publishedYes
Event23rd Euromicro International Conference on Parallel, Distributed, and Network-Based Processing, PDP 2015 - Turku, Finland
Duration: Mar 4 2015Mar 6 2015

Publication series

NameProceedings - 23rd Euromicro International Conference on Parallel, Distributed, and Network-Based Processing, PDP 2015

Conference

Conference23rd Euromicro International Conference on Parallel, Distributed, and Network-Based Processing, PDP 2015
Country/TerritoryFinland
CityTurku
Period3/4/153/6/15

Keywords

  • Communication
  • Hardware topology
  • Memory hierarchy
  • Task mapping

ASJC Scopus subject areas

  • Hardware and Architecture
  • Computer Networks and Communications

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