Abstract
Reed-Solomon codes are used as error-correcting codes in diverse communication system applications. The decoding performance of traditional hard-decision Reed-Solomon decoders can be improved via the use of sonft-decoding algorithms such as generalized minimum distance decoding, algebraic sonft-decision decoding, and ordered statistics decoding. While it is relatively straight-forward to compare the decoding performance of these algorithms, it is harder to compare their hardware complexity. This is because an efficient architecture has a dramatic effect on the final implementation complexity. In this paper, we present efficient hardware architectures for each of the sonft-decoding algorithms and compare their implementation complexity.
Original language | English (US) |
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Title of host publication | Conference Record of the 40th Asilomar Conference on Signals, Systems and Computers, ACSSC '06 |
Pages | 912-916 |
Number of pages | 5 |
DOIs | |
State | Published - 2006 |
Event | 40th Asilomar Conference on Signals, Systems, and Computers, ACSSC '06 - Pacific Grove, CA, United States Duration: Oct 29 2006 → Nov 1 2006 |
Other
Other | 40th Asilomar Conference on Signals, Systems, and Computers, ACSSC '06 |
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Country/Territory | United States |
City | Pacific Grove, CA |
Period | 10/29/06 → 11/1/06 |
ASJC Scopus subject areas
- Engineering(all)