An 8.5-11.5-Gbps SONET transceiver with referenceless frequency acquisition

Namik Kocaman, Siavash Fallahi, Mahyar Kargar, Mehdi Khanpour, Ali Nazemi, Ullas Singh, Afshin Momtaz

Research output: Contribution to journalArticle

Abstract

An 8.5-11.5-Gbps SONET transceiver with referenceless clock and data recovery (CDR) employing an algorithmic frequency acquisition scheme is presented. Without any training sequence, the frequency acquisition algorithm utilizes a modified digital quadricorrelator frequency detector (M-DQFD) incorporated into an LC-based VCO coarse tuning adjustment. M-DQFD eliminates the dead-zone problem associated with high dispersion and low SNR links. Fabricated in 65-nm CMOS process, the transceiver complies with stringent OC-192 jitter requirements. With a 400-μs acquisition time, the receiver achieves a high-frequency jitter tolerance of 0.58UIpp at 10-mVppd input sensitivity. The transmitter output exhibits a random jitter of 205fs rms. The transceiver occupies 0.97 mm2 and consumes 125 mA at 1.0-V supply voltage.

Original languageEnglish (US)
Article number6516616
Pages (from-to)1875-1884
Number of pages10
JournalIEEE Journal of Solid-State Circuits
Volume48
Issue number8
DOIs
StatePublished - May 20 2013
Externally publishedYes

Keywords

  • Clock and data recovery (CDR)
  • Digital quadricorrelator frequency detector (DQFD)
  • OC-192
  • Referenceless
  • Repeater
  • SONET
  • Transceiver

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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  • Cite this

    Kocaman, N., Fallahi, S., Kargar, M., Khanpour, M., Nazemi, A., Singh, U., & Momtaz, A. (2013). An 8.5-11.5-Gbps SONET transceiver with referenceless frequency acquisition. IEEE Journal of Solid-State Circuits, 48(8), 1875-1884. [6516616]. https://doi.org/10.1109/JSSC.2013.2259033