Affinity-based thread and data mapping in shared memory systems

Matthias Diener, Eduardo H.M. Cruz, Marco A.Z. Alves, Philippe O.A. Navaux, Israel Koren

Research output: Contribution to journalArticlepeer-review


Shared memory architectures have recently experienced a large increase in thread-level parallelism, leading to complex memory hierarchies with multiple cache memory levels and memory controllers. These new designs created a Non-Uniform Memory Access (NUMA) behavior, where the performance and energy consumption of memory accesses depend on the place where the data is located in the memory hierarchy. Accesses to local caches or memory controllers are generally more efficient than accesses to remote ones. A common way to improve the locality and balance of memory accesses is to determine the mapping of threads to cores and data to memory controllers based on the affinity between threads and data. Such mapping techniques can operate at different hardware and software levels, which impacts their complexity, applicability, and the resulting performance and energy consumption gains. In this article, we introduce a taxonomy to classify different mapping mechanisms and provide a comprehensive overview of existing solutions.

Original languageEnglish (US)
Article number64
JournalACM Computing Surveys
Issue number4
StatePublished - Dec 2016
Externally publishedYes


  • Cache memories
  • Communication
  • Data mapping
  • NUMA
  • Shared memory
  • Survey
  • Thread mapping

ASJC Scopus subject areas

  • Theoretical Computer Science
  • General Computer Science


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