Abstract
In circuit design, a transistor-level view has become a paramount importance for successful designs, especially in the very demanding context of high performance microprocessor design in the deep-submicron regime. In this paper this transistor level view is considered. The VLSI custom design problem is approach from the three perspectives of transistor-level static timing analysis, fast transistor-level simulation and transistor-level optimization process.
Original language | English (US) |
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Pages (from-to) | 611 |
Number of pages | 1 |
Journal | IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers |
State | Published - 1999 |
Externally published | Yes |
Event | Proceedings of the 1999 IEEE/ACM International Conference on Computer-Aided Design (ICCAD-99) - San Jose, CA, USA Duration: Nov 7 1999 → Nov 11 1999 |
ASJC Scopus subject areas
- Software
- Computer Science Applications
- Computer Graphics and Computer-Aided Design