In circuit design, a transistor-level view has become a paramount importance for successful designs, especially in the very demanding context of high performance microprocessor design in the deep-submicron regime. In this paper this transistor level view is considered. The VLSI custom design problem is approach from the three perspectives of transistor-level static timing analysis, fast transistor-level simulation and transistor-level optimization process.
|Original language||English (US)|
|Number of pages||1|
|Journal||IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers|
|State||Published - 1999|
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