Advances in transistor timing, simulation, and optimization

In circuit design, a transistor-level view has become a paramount importance for successful designs, especially in the very demanding context of high performance microprocessor design in the deep-submicron regime. In this paper this transistor level view is considered. The VLSI custom design problem is approach from the three perspectives of transistor-level static timing analysis, fast transistor-level simulation and transistor-level optimization process.