Adaptive partitioning for irregular applications on heterogeneous CPU-GPU chips

Antonio Vilches, Rafael Asenjo, Angeles Navarro, Francisco Corbera, Rubén Gran, María Garzarán

Research output: Contribution to journalConference article

Abstract

Commodity processors are comprised of several CPU cores and one integrated GPU. To fully exploit this type of architectures, one needs to automatically determine how to partition the workload between both devices. This is specially challenging for irregular workloads, where each iteration's work is data dependent and shows control and memory divergence. In this paper, we present a novel adaptive partitioning strategy specially designed for irregular applications running on heterogeneous CPU-GPU chips. The main novelty of this work is that the size of the workload assigned to the GPU and CPU adapts dynamically to maximize the GPU and CPU utilization while balancing the workload among the devices. Our experimental results on an Intel Haswell architecture using a set of irregular benchmarks show that our approach outperforms exhaustive static and adaptive state-of-the-art approaches in terms of performance and energy consumption.

Original languageEnglish (US)
Pages (from-to)140-149
Number of pages10
JournalProcedia Computer Science
Volume51
Issue number1
DOIs
StatePublished - Jan 1 2015
EventInternational Conference on Computational Science, ICCS 2002 - Amsterdam, Netherlands
Duration: Apr 21 2002Apr 24 2002

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Program processors
Energy utilization
Graphics processing unit
Data storage equipment

Keywords

  • Adaptive partitioning
  • Dynamic scheduling
  • Heterogeneous CPU-GPU chips
  • Parallel for

ASJC Scopus subject areas

  • Computer Science(all)

Cite this

Adaptive partitioning for irregular applications on heterogeneous CPU-GPU chips. / Vilches, Antonio; Asenjo, Rafael; Navarro, Angeles; Corbera, Francisco; Gran, Rubén; Garzarán, María.

In: Procedia Computer Science, Vol. 51, No. 1, 01.01.2015, p. 140-149.

Research output: Contribution to journalConference article

Vilches, Antonio ; Asenjo, Rafael ; Navarro, Angeles ; Corbera, Francisco ; Gran, Rubén ; Garzarán, María. / Adaptive partitioning for irregular applications on heterogeneous CPU-GPU chips. In: Procedia Computer Science. 2015 ; Vol. 51, No. 1. pp. 140-149.
@article{3b0fb8b98bca48a1a07e6faf02f8ff9f,
title = "Adaptive partitioning for irregular applications on heterogeneous CPU-GPU chips",
abstract = "Commodity processors are comprised of several CPU cores and one integrated GPU. To fully exploit this type of architectures, one needs to automatically determine how to partition the workload between both devices. This is specially challenging for irregular workloads, where each iteration's work is data dependent and shows control and memory divergence. In this paper, we present a novel adaptive partitioning strategy specially designed for irregular applications running on heterogeneous CPU-GPU chips. The main novelty of this work is that the size of the workload assigned to the GPU and CPU adapts dynamically to maximize the GPU and CPU utilization while balancing the workload among the devices. Our experimental results on an Intel Haswell architecture using a set of irregular benchmarks show that our approach outperforms exhaustive static and adaptive state-of-the-art approaches in terms of performance and energy consumption.",
keywords = "Adaptive partitioning, Dynamic scheduling, Heterogeneous CPU-GPU chips, Parallel for",
author = "Antonio Vilches and Rafael Asenjo and Angeles Navarro and Francisco Corbera and Rub{\'e}n Gran and Mar{\'i}a Garzar{\'a}n",
year = "2015",
month = "1",
day = "1",
doi = "10.1016/j.procs.2015.05.213",
language = "English (US)",
volume = "51",
pages = "140--149",
journal = "Procedia Computer Science",
issn = "1877-0509",
publisher = "Elsevier BV",
number = "1",

}

TY - JOUR

T1 - Adaptive partitioning for irregular applications on heterogeneous CPU-GPU chips

AU - Vilches, Antonio

AU - Asenjo, Rafael

AU - Navarro, Angeles

AU - Corbera, Francisco

AU - Gran, Rubén

AU - Garzarán, María

PY - 2015/1/1

Y1 - 2015/1/1

N2 - Commodity processors are comprised of several CPU cores and one integrated GPU. To fully exploit this type of architectures, one needs to automatically determine how to partition the workload between both devices. This is specially challenging for irregular workloads, where each iteration's work is data dependent and shows control and memory divergence. In this paper, we present a novel adaptive partitioning strategy specially designed for irregular applications running on heterogeneous CPU-GPU chips. The main novelty of this work is that the size of the workload assigned to the GPU and CPU adapts dynamically to maximize the GPU and CPU utilization while balancing the workload among the devices. Our experimental results on an Intel Haswell architecture using a set of irregular benchmarks show that our approach outperforms exhaustive static and adaptive state-of-the-art approaches in terms of performance and energy consumption.

AB - Commodity processors are comprised of several CPU cores and one integrated GPU. To fully exploit this type of architectures, one needs to automatically determine how to partition the workload between both devices. This is specially challenging for irregular workloads, where each iteration's work is data dependent and shows control and memory divergence. In this paper, we present a novel adaptive partitioning strategy specially designed for irregular applications running on heterogeneous CPU-GPU chips. The main novelty of this work is that the size of the workload assigned to the GPU and CPU adapts dynamically to maximize the GPU and CPU utilization while balancing the workload among the devices. Our experimental results on an Intel Haswell architecture using a set of irregular benchmarks show that our approach outperforms exhaustive static and adaptive state-of-the-art approaches in terms of performance and energy consumption.

KW - Adaptive partitioning

KW - Dynamic scheduling

KW - Heterogeneous CPU-GPU chips

KW - Parallel for

UR - http://www.scopus.com/inward/record.url?scp=84939160371&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=84939160371&partnerID=8YFLogxK

U2 - 10.1016/j.procs.2015.05.213

DO - 10.1016/j.procs.2015.05.213

M3 - Conference article

AN - SCOPUS:84939160371

VL - 51

SP - 140

EP - 149

JO - Procedia Computer Science

JF - Procedia Computer Science

SN - 1877-0509

IS - 1

ER -