Accurate Low-Cost Methods for Performance Evaluation of Cache Memory Systems

Subhasis Laha, Janak H. Patel, Ravishankar K. Iyer

Research output: Contribution to journalArticlepeer-review

Abstract

Trace-driven simulation is a simple way of evaluating cache memory systems with varying hardware parameters. But to evaluate realistic workloads, simulating even a few million addresses is not adequate and such large scale simulation is impractical from the consideration of space and time requirements. In this paper, new methods of simulation based on statistical techniques are proposed for decreasing the need for large trace measurements and for predicting true program behavior. In our method, sampling techniques are applied while collecting the address trace from a workload. This drastically reduces the space and time needed to collect the trace. New simulation techniques are developed to use the sampled data not only to predict the mean miss rate of the cache, but also to provide an empirical estimate of its actual distribution. Finally, a new concept of primed cache is introduced to simulate large caches by the sampling based method.

Original languageEnglish (US)
Pages (from-to)1325-1336
Number of pages12
JournalIEEE Transactions on Computers
Volume37
Issue number11
DOIs
StatePublished - Nov 1988

Keywords

  • Cache memory
  • performance evaluation
  • sampling technique

ASJC Scopus subject areas

  • Software
  • Theoretical Computer Science
  • Hardware and Architecture
  • Computational Theory and Mathematics

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