Abstract
In this project, we propose an SoC solution to accelerate the Pair-HMM's forward algorithm which is the key performance bottleneck in the GATK's HaplotypeCaller tool for DNA variant calling. We develop two versions of the Pair-HMM accelerator: one using High Level Synthesis (HLS), and another ring-based manual RTL implementation. We investigate the performance of the manual RTL design and HLS design in terms of design flexibility and overall run-time. We achieve a significant speed-up of up to 19x through the HLS implementation and speed-up of up to 95x through the RTL implementation of the algorithm.
| Original language | English (US) |
|---|---|
| Title of host publication | Proceedings - 24th IEEE International Symposium on Field-Programmable Custom Computing Machines, FCCM 2016 |
| Publisher | Institute of Electrical and Electronics Engineers Inc. |
| Number of pages | 1 |
| ISBN (Electronic) | 9781509023561 |
| DOIs | |
| State | Published - Aug 16 2016 |
| Event | 24th IEEE International Symposium on Field-Programmable Custom Computing Machines, FCCM 2016 - Washington, United States Duration: May 1 2016 → May 3 2016 |
Publication series
| Name | Proceedings - 24th IEEE International Symposium on Field-Programmable Custom Computing Machines, FCCM 2016 |
|---|
Other
| Other | 24th IEEE International Symposium on Field-Programmable Custom Computing Machines, FCCM 2016 |
|---|---|
| Country | United States |
| City | Washington |
| Period | 5/1/16 → 5/3/16 |
Fingerprint
ASJC Scopus subject areas
- Hardware and Architecture
Cite this
Acceleration of the Pair-HMM Algorithm for DNA Variant Calling. / Manikandan, Gowthami Jayashri; Huang, Sitao; Rupnow, Kyle; Hwu, Wen-Mei W; Chen, Deming.
Proceedings - 24th IEEE International Symposium on Field-Programmable Custom Computing Machines, FCCM 2016. Institute of Electrical and Electronics Engineers Inc., 2016. 7544765 (Proceedings - 24th IEEE International Symposium on Field-Programmable Custom Computing Machines, FCCM 2016).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
}
TY - GEN
T1 - Acceleration of the Pair-HMM Algorithm for DNA Variant Calling
AU - Manikandan, Gowthami Jayashri
AU - Huang, Sitao
AU - Rupnow, Kyle
AU - Hwu, Wen-Mei W
AU - Chen, Deming
PY - 2016/8/16
Y1 - 2016/8/16
N2 - In this project, we propose an SoC solution to accelerate the Pair-HMM's forward algorithm which is the key performance bottleneck in the GATK's HaplotypeCaller tool for DNA variant calling. We develop two versions of the Pair-HMM accelerator: one using High Level Synthesis (HLS), and another ring-based manual RTL implementation. We investigate the performance of the manual RTL design and HLS design in terms of design flexibility and overall run-time. We achieve a significant speed-up of up to 19x through the HLS implementation and speed-up of up to 95x through the RTL implementation of the algorithm.
AB - In this project, we propose an SoC solution to accelerate the Pair-HMM's forward algorithm which is the key performance bottleneck in the GATK's HaplotypeCaller tool for DNA variant calling. We develop two versions of the Pair-HMM accelerator: one using High Level Synthesis (HLS), and another ring-based manual RTL implementation. We investigate the performance of the manual RTL design and HLS design in terms of design flexibility and overall run-time. We achieve a significant speed-up of up to 19x through the HLS implementation and speed-up of up to 95x through the RTL implementation of the algorithm.
UR - http://www.scopus.com/inward/record.url?scp=84987621291&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=84987621291&partnerID=8YFLogxK
U2 - 10.1109/FCCM.2016.42
DO - 10.1109/FCCM.2016.42
M3 - Conference contribution
T3 - Proceedings - 24th IEEE International Symposium on Field-Programmable Custom Computing Machines, FCCM 2016
BT - Proceedings - 24th IEEE International Symposium on Field-Programmable Custom Computing Machines, FCCM 2016
PB - Institute of Electrical and Electronics Engineers Inc.
ER -