@inproceedings{5a354ec8e132497abd7a63fedc60d568,
title = "Accelerating sparse deep neural networks on FPGAs",
abstract = "Deep neural networks (DNNs) have been widely adopted in many domains, including computer vision, natural language processing, and medical care. Recent research reveals that sparsity in DNN parameters can be exploited to reduce inference computational complexity and improve network quality. However, sparsity also introduces irregularity and extra complexity in data processing, which make the accelerator design challenging. This work presents the design and implementation of a highly flexible sparse DNN inference accelerator on FPGA. Our proposed inference engine can be easily configured to be used in both mobile computing and high-performance computing scenarios. Evaluation shows our proposed inference engine effectively accelerates sparse DNNs and outperforms CPU solution by up to 4.7 \times in terms of energy efficiency.",
keywords = "Deep learning, FPGA, Graphs, Sparse DNN",
author = "Sitao Huang and Carl Pearson and Rakesh Nagi and Jinjun Xiong and Deming Chen and Hwu, {Wen Mei}",
note = "Publisher Copyright: {\textcopyright} 2019 IEEE.; 2019 IEEE High Performance Extreme Computing Conference, HPEC 2019 ; Conference date: 24-09-2019 Through 26-09-2019",
year = "2019",
month = sep,
doi = "10.1109/HPEC.2019.8916419",
language = "English (US)",
series = "2019 IEEE High Performance Extreme Computing Conference, HPEC 2019",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
booktitle = "2019 IEEE High Performance Extreme Computing Conference, HPEC 2019",
address = "United States",
}