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Accelerating data movement on future chip multi-processors
Junli Gu
,
Rakesh Kumar
,
Steven S. Lumetta
, Yihe Sun
Electrical and Computer Engineering
Information Trust Institute
Coordinated Science Lab
Siebel School of Computing and Data Science
Research output
:
Chapter in Book/Report/Conference proceeding
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Conference contribution
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Keyphrases
Caching
100%
Data Movement
100%
Chip multiprocessor
100%
On chip
66%
MPI Benchmarks
66%
High Performance
33%
Performance Improvement
33%
Performance Gain
33%
Intel
33%
Pyrite
33%
Message Passing
33%
Micro-benchmarks
33%
Cache Miss
33%
Data Placement
33%
Data Transfer
33%
Hardware Optimization
33%
Reduced Latency
33%
Address Space
33%
Zero-copy
33%
Coherence Protocol
33%
Full-system Simulation
33%
Simics
33%
Cache Coherence
33%
Coherence Traffic
33%
Memory Latency
33%
Traffic Performance
33%
Traffic Reduction
33%
Computer Science
Chip Multiprocessor
100%
Computer Hardware
100%
Performance Gain
50%
Performance Improvement
50%
Message Passing
50%
Data Placement
50%
Hardware Optimization
50%
Memory Latency
50%
Microbenchmarks
50%
Managing Data
50%