TY - JOUR
T1 - A wideband InP DHBT true logarithmic amplifier
AU - Chuang, Yu Ju
AU - Cimino, Kurt
AU - Stuenkel, Mark
AU - Feng, Milton
AU - Le, Minh
AU - Milano, Raymond
N1 - Funding Information:
The authors would like to thank the Defense and Advanced Research Projects Agency (DARPA) Technology for Frequency Agile digitally Synthesized Transmitters (TFAST) Program Manager Dr. S. Pappert and Army Research Laboratory (ARL) Contract Manager Dr. A. Hung for program support. The authors also thank the encouragement and feedback from F. Stroili, R. Elder and J. Feng, all with BAE Systems, Nashua, NH.
Funding Information:
Manuscript received April 5, 2006; revised June 29, 2006. This work was supported in part by the Army Research Laboratory under Contract DAAD17-02-C-0115 and by the Defense Advanced Research Projects Agency. Y.-J. Chuang, K. Cimino, M. Stuenkel, and M. Feng are with the Department of Electrical and Computer Engineering, University of Illinois at Urbana-Champaign, Urbana, IL 61801 USA (e-mail: [email protected]). M. Le and R. Milano are with Vitesse Semiconductor Inc., Camarillo, CA 93012 USA. Digital Object Identifier 10.1109/TMTT.2006.883239 Fig. 1. Modeling results of: (a) dc and (b) f of the 0.5 m 3.0 m VIP2 InP/InGaAs DHBT used in this amplifier design. Solid lines are measured data and markers are model simulation.
PY - 2006/11
Y1 - 2006/11
N2 - A wideband logarithmic amplifier is demonstrated in this paper using InP-InGaAs double heterojunction bipolar transistor technology. The amplifier uses cascaded gain stages including the limiting and unity amplifiers to achieve a piecewise approximation to the ideal logarithmic response. The performance of 43-dB dynamic range, 22-GHz bandwidth, and < ±2-dB log error is achieved. The integrated circuit consumes 650 mW and has a chip dimension of 1 × 0.8 mm2.
AB - A wideband logarithmic amplifier is demonstrated in this paper using InP-InGaAs double heterojunction bipolar transistor technology. The amplifier uses cascaded gain stages including the limiting and unity amplifiers to achieve a piecewise approximation to the ideal logarithmic response. The performance of 43-dB dynamic range, 22-GHz bandwidth, and < ±2-dB log error is achieved. The integrated circuit consumes 650 mW and has a chip dimension of 1 × 0.8 mm2.
KW - Heterojunction bipolar transistors (HBTs)
KW - High-speed integrated circuits
KW - Logarithmic amplifiers
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U2 - 10.1109/TMTT.2006.883239
DO - 10.1109/TMTT.2006.883239
M3 - Article
AN - SCOPUS:33750824735
SN - 0018-9480
VL - 54
SP - 3843
EP - 3847
JO - IEEE Transactions on Microwave Theory and Techniques
JF - IEEE Transactions on Microwave Theory and Techniques
IS - 11
M1 - 1717751
ER -