A Verilog-A compact model for ESD protection NMOSTs

Junjun Li, Sopan Joshi, Elyse Rosenbaum

Research output: Contribution to journalConference article

Abstract

We present a simulator-independent, compact model of the ESD protection NMOST, suitable for circuit-level simulation. The Verilog-A language is used for the model development. Small-signal and large-signal models are provided to ensure accurate ac and transient simulation. Improved avalanche multiplication factor equations are used to avoid convergence problems.

Original languageEnglish (US)
Pages (from-to)253-256
Number of pages4
JournalProceedings of the Custom Integrated Circuits Conference
StatePublished - Nov 19 2003
EventProceedings of the IEEE 2003 Custom Integrated Circuits Conference - San Jose, CA, United States
Duration: Sep 21 2003Sep 24 2003

Fingerprint

Computer hardware description languages
Simulators
Networks (circuits)

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

Cite this

A Verilog-A compact model for ESD protection NMOSTs. / Li, Junjun; Joshi, Sopan; Rosenbaum, Elyse.

In: Proceedings of the Custom Integrated Circuits Conference, 19.11.2003, p. 253-256.

Research output: Contribution to journalConference article

@article{fa34aa2d8d5c4a5c959c3f07e06f5b8e,
title = "A Verilog-A compact model for ESD protection NMOSTs",
abstract = "We present a simulator-independent, compact model of the ESD protection NMOST, suitable for circuit-level simulation. The Verilog-A language is used for the model development. Small-signal and large-signal models are provided to ensure accurate ac and transient simulation. Improved avalanche multiplication factor equations are used to avoid convergence problems.",
author = "Junjun Li and Sopan Joshi and Elyse Rosenbaum",
year = "2003",
month = "11",
day = "19",
language = "English (US)",
pages = "253--256",
journal = "Proceedings of the Custom Integrated Circuits Conference",
issn = "0886-5930",
publisher = "Institute of Electrical and Electronics Engineers Inc.",

}

TY - JOUR

T1 - A Verilog-A compact model for ESD protection NMOSTs

AU - Li, Junjun

AU - Joshi, Sopan

AU - Rosenbaum, Elyse

PY - 2003/11/19

Y1 - 2003/11/19

N2 - We present a simulator-independent, compact model of the ESD protection NMOST, suitable for circuit-level simulation. The Verilog-A language is used for the model development. Small-signal and large-signal models are provided to ensure accurate ac and transient simulation. Improved avalanche multiplication factor equations are used to avoid convergence problems.

AB - We present a simulator-independent, compact model of the ESD protection NMOST, suitable for circuit-level simulation. The Verilog-A language is used for the model development. Small-signal and large-signal models are provided to ensure accurate ac and transient simulation. Improved avalanche multiplication factor equations are used to avoid convergence problems.

UR - http://www.scopus.com/inward/record.url?scp=0242527290&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=0242527290&partnerID=8YFLogxK

M3 - Conference article

AN - SCOPUS:0242527290

SP - 253

EP - 256

JO - Proceedings of the Custom Integrated Circuits Conference

JF - Proceedings of the Custom Integrated Circuits Conference

SN - 0886-5930

ER -