A Verilog-A compact model for ESD protection NMOSTs

Junjun Li, Sopan Joshi, Elyse Rosenbaum

Research output: Contribution to journalConference articlepeer-review


We present a simulator-independent, compact model of the ESD protection NMOST, suitable for circuit-level simulation. The Verilog-A language is used for the model development. Small-signal and large-signal models are provided to ensure accurate ac and transient simulation. Improved avalanche multiplication factor equations are used to avoid convergence problems.

Original languageEnglish (US)
Pages (from-to)253-256
Number of pages4
JournalProceedings of the Custom Integrated Circuits Conference
StatePublished - 2003
EventProceedings of the IEEE 2003 Custom Integrated Circuits Conference - San Jose, CA, United States
Duration: Sep 21 2003Sep 24 2003

ASJC Scopus subject areas

  • Electrical and Electronic Engineering


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