A task-centric memory model for scalable accelerator architectures

Keyphrases

• Memory Models 100%
• Accelerator Architectures 100%
• Hardware Caches 66%
• Visual Processing 33%
• Model Support 33%
• Parallel Computing 33%
• Computing Applications 33%
• Core Processor 33%
• Cache Coherence 33%
• Single Address Space 33%
• Compute Accelerator 33%
• Task-based Programming Model 33%

Computer Science

• Memory Model 100%
• Hardware Cache 66%
• Visual Computing 33%
• Programming Model 33%
• Core Processor 33%
• Cache Coherence 33%
• Protocol Software 33%