A synthesis flow toward fast parasitic closure for radio-frequency integrated circuits

Gang Zhang, Aykut Dengi, Ronald A. Rohrer, Rob A. Rutenbar, L. Richard Carley

Research output: Contribution to journalConference articlepeer-review


An electrical and physical synthesis flow for high-speed analog and radio-frequency circuits is presented in this paper. Novel techniques aiming at fast parasitic closure are employed throughout the flow. Parasitic corners generated based on the earlier placement statistics are included for circuit resizing to enable parasitic robust designs. A performance-driven placement with simultaneous fast incremental global routing is proposed to achieve accurate parasitic estimation. Device tuning is utilized during layout to compensate for layout induced performance degradations. This methodology allows sophisticated macromodels of performances versus device variables and parasitics to be used during layout synthesis to make it truly performance-driven. Experimental results of a 4GHz LNA and a mixer demonstrate fast parasitic closure with this methodology.

Original languageEnglish (US)
Pages (from-to)155-158
Number of pages4
JournalProceedings - Design Automation Conference
StatePublished - 2004
Externally publishedYes
EventProceedings of the 41st Design Automation Conference - San Diego, CA, United States
Duration: Jun 7 2004Jun 11 2004


  • Layout
  • Modeling
  • Parasitic
  • Radio Frequency
  • Sizing
  • Synthesis

ASJC Scopus subject areas

  • Hardware and Architecture
  • Control and Systems Engineering


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