A study of vertical SiGe thyristor design and optimization

Sopan Joshi, Richard Ida, Elyse Rosenbaum

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

We present extensive measurement results investigating the design and optimization of vertical SiGe thyristors for use as ESD protection elements in RF integrated circuits. Experiments include variations of the anode material, contact geometry, and buried layer, as well as a detailed study of optimal area scaling. RF characterization using s-parameter data is presented.

Original languageEnglish (US)
Title of host publication2003 Electrical Overstress/Electrostatic Discharge Symposium, EOS/ESD 2003
PublisherESD Association
ISBN (Electronic)1585370576, 9781585370573
StatePublished - Jan 1 2003
Event25th Electrical Overstress/Electrostatic Discharge Symposium, EOS/ESD 2003 - Las Vegas, United States
Duration: Sep 21 2003Sep 25 2003

Publication series

NameElectrical Overstress/Electrostatic Discharge Symposium Proceedings
Volume2003-January
ISSN (Print)0739-5159

Other

Other25th Electrical Overstress/Electrostatic Discharge Symposium, EOS/ESD 2003
CountryUnited States
CityLas Vegas
Period9/21/039/25/03

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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