TY - JOUR
T1 - A Redundant Unit to Form T-Type Three-Level Inverters Tolerant of IGBT Open-Circuit Faults in Multiple Legs
AU - Wang, Borong
AU - Li, Zhan
AU - Bai, Zhihong
AU - Krein, Philip T.
AU - Ma, Hao
N1 - This work was supported in part by the National Nature Science Foundation of China under Grant 51337009 and in part by the Zhejiang University/University of Illinois at Urbana-Champaign Institute. Z. Bai, P. T. Krein, and H. Ma were the Principal Supervisors. Recommended for publication by Associate Editor Y. Xue.
Manuscript received October 30, 2018; revised February 15, 2019; accepted April 7, 2019. Date of publication April 18, 2019; date of current version October 18, 2019. This work was supported in part by the National Nature Science Foundation of China under Grant 51337009 and in part by the Zhejiang University/University of Illinois at Urbana-Champaign Institute. Z. Bai, P. T. Krein, and H. Ma were the Principal Supervisors. Recommended for publication by Associate Editor Y. Xue. (Corresponding author: Hao Ma.) B. Wang and H. Ma are with the College of Electrical Engineering, Zhejiang University, Hangzhou 310027, China, and also with the Zhejiang University/University of Illinois at Urbana-Champaign Institute, Haining 314400, China (e-mail: [email protected]; [email protected]).
PY - 2020/1
Y1 - 2020/1
N2 - T-type multilevel (T2ML) inverters feature low total harmonic distortion and high efficiency. Reliability improvement is particularly important for T2ML inverters because they have high power device count. Methods that provide T2ML inverters with the ability to tolerate simultaneous failures of multiple switches in several legs have not been addressed in the existing literature. This paper proposes a redundant unit that can be shared across phases in a T-type three-level inverter topology to manage open-circuit faults in multiple legs. The redundant unit includes two switches and six diodes, with the extra active switches connected by diodes to each middle switch of the base inverter. Under fault conditions, a standby parallel leg consisting of middle switches and the added redundant devices can be formed in each phase of the inverter to provide an extra current path connecting the dc bus and loads. The middle switches can share the redundant unit simultaneously to replace faulted half-bridge switches. By these means, open-circuit faults in multiple legs can be tolerated simultaneously and the rated output capacity can be maintained during faulted operation. Experimental tests are given to verify the effectiveness and feasibility of this proposed fault-tolerant method.
AB - T-type multilevel (T2ML) inverters feature low total harmonic distortion and high efficiency. Reliability improvement is particularly important for T2ML inverters because they have high power device count. Methods that provide T2ML inverters with the ability to tolerate simultaneous failures of multiple switches in several legs have not been addressed in the existing literature. This paper proposes a redundant unit that can be shared across phases in a T-type three-level inverter topology to manage open-circuit faults in multiple legs. The redundant unit includes two switches and six diodes, with the extra active switches connected by diodes to each middle switch of the base inverter. Under fault conditions, a standby parallel leg consisting of middle switches and the added redundant devices can be formed in each phase of the inverter to provide an extra current path connecting the dc bus and loads. The middle switches can share the redundant unit simultaneously to replace faulted half-bridge switches. By these means, open-circuit faults in multiple legs can be tolerated simultaneously and the rated output capacity can be maintained during faulted operation. Experimental tests are given to verify the effectiveness and feasibility of this proposed fault-tolerant method.
KW - Fault tolerance
KW - T-type inverter
KW - multiple legs
KW - multiple switches
KW - open-circuit (OC) fault
KW - redundant unit sharing
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U2 - 10.1109/TPEL.2019.2912177
DO - 10.1109/TPEL.2019.2912177
M3 - Article
AN - SCOPUS:85074204694
SN - 0885-8993
VL - 35
SP - 924
EP - 939
JO - IEEE Transactions on Power Electronics
JF - IEEE Transactions on Power Electronics
IS - 1
M1 - 8693980
ER -