Abstract
A 12-mask novel BiCMOS process, incorporating a vertically integrated three-dimensional CMOS inherently merged with a high-performance bipolar transistor is presented. The BiCMOS process uses selective epitaxial growth (SEG) and epitaxial lateral overgrowth (ELO) to form the active device regions. The features of the process are described, and key issues are addressed through simulation and preliminary experimental results. Two-dimensional SUPREM4 simulations indicate that shallow junctions can be obtained in the bipolar as well as the CMOS. Scanning electron micrographs are presented in support of the feasibility of the process.
| Original language | English (US) |
|---|---|
| Title of host publication | Proceedings of the Custom Integrated Circuits Conference |
| Publisher | Publ by IEEE |
| ISBN (Print) | 0780300157 |
| State | Published - 1991 |
| Externally published | Yes |
| Event | Proceedings of the IEEE 1991 Custom Integrated Circuits Conference - San Diego, CA, USA Duration: May 12 1991 → May 15 1991 |
Publication series
| Name | Proceedings of the Custom Integrated Circuits Conference |
|---|---|
| ISSN (Print) | 0886-5930 |
Other
| Other | Proceedings of the IEEE 1991 Custom Integrated Circuits Conference |
|---|---|
| City | San Diego, CA, USA |
| Period | 5/12/91 → 5/15/91 |
ASJC Scopus subject areas
- Electrical and Electronic Engineering