A novel TCAD-based methodology to minimize the impact of parasitic structures on ESD performance

Nicholas Olson, Gianluca Boselli, Akram Salman, Elyse Rosenbaum

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

During an ESD event, breakdown of a parasitic bipolar transistor can lead to chip failure. For a variety of ESD protection networks, it is demonstrated that TCAD simulations correctly predict the stress level at which failure occurs due to bipolar breakdown. A procedure to characterize the interaction between any two N-type diffusions and the ESD cells to which they are connected is presented.

Original languageEnglish (US)
Title of host publication2010 IEEE International Reliability Physics Symposium, IRPS 2010
Pages474-479
Number of pages6
DOIs
StatePublished - 2010
Event2010 IEEE International Reliability Physics Symposium, IRPS 2010 - Garden Grove, CA, Canada
Duration: May 2 2010May 6 2010

Publication series

NameIEEE International Reliability Physics Symposium Proceedings
ISSN (Print)1541-7026

Other

Other2010 IEEE International Reliability Physics Symposium, IRPS 2010
Country/TerritoryCanada
CityGarden Grove, CA
Period5/2/105/6/10

Keywords

  • ESD
  • Electrostatic discharge
  • Parasitic bipolar
  • TCAD

ASJC Scopus subject areas

  • General Engineering

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