A novel decoupling capacitance platform for substrates, sockets, and interposers

Josh G. Nickel, Joseph F. Rosenberger, Stanford W. Crane, Zsolt Horvath, James Jeon, Patrick T. Codd, Andreas C. Cangellaris

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Due to increasing demands on the power delivery networks within current and next-generation computer systems, power integrity has become a leading focus, in addition to signal integrity, in system design. In this paper, we will present a technology deployed within substrates, interposers, or sockets to enhance core power delivery. Our technology is comprised of a novel integration of decoupling capacitance between the core power nets and ground. This decoupling replaces the numerous decoupling capacitors suboptimally placed on traditional printed circuit boards (PCBs). The net result it lowered power supply noise and increased core power stability, permitting greater semiconductor switching frequency while reducing overall system cost. Studying actual system applications, we compare this technology to a wide range of expensive and largely ineffective decoupling strategies that have been proposed and even deployed, and demonstrate its superiority in both cost and performance.

Original languageEnglish (US)
Title of host publicationProceedings of 6th Electronics Packaging Technology Conference, EPTC 2004
EditorsK.C. Toh, Y.C. Mui, J. How, J.H.L. Pang
Pages231-234
Number of pages4
StatePublished - 2004
Externally publishedYes
Event6th Electronics Packaging Technology Conference, EPTC 2004 - Singapore, Singapore
Duration: Dec 8 2005Dec 10 2005

Publication series

NameProceedings of 6th Electronics Packaging Technology Conference, EPTC 2004

Other

Other6th Electronics Packaging Technology Conference, EPTC 2004
Country/TerritorySingapore
CitySingapore
Period12/8/0512/10/05

ASJC Scopus subject areas

  • General Engineering

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