A noise-shaping time-to-digital converter using switched-ring oscillators - Analysis, design, and measurement techniques

Amr Elshazly, Sachin Rao, Brian Young, Pavan Kumar Hanumolu

Research output: Contribution to journalArticlepeer-review

Abstract

A high-resolution time-to-digital converter (TDC) using switched-ring oscillators (SROs) is presented. Leveraging oversampling and noise shaping, the proposed SRO-TDC achieves high resolution without the need for calibration. Ring oscillators are switched between two frequencies to achieve noise shaping of the quantization error in an open-loop manner. By decoupling the sampling clock and input carrier frequencies, SRO-TDC is capable of operating at high oversampling ratios (OSRs). This paper also discusses different noise sources and quantization/device noise tradeoffs in noise-shaping TDCs and presents techniques to characterize TDC linearity, range, and noise performance. Fabricated in 90 nm CMOS technology, the proposed TDC operates over a wide range of input carrier frequencies (0.6-750 MHz) and sampling rates (50-750 MS/s). At 500 MS/s and 80 MHz carrier frequency, it achieves an integrated noise of 315 fs in a 1 MHz bandwidth while consuming 1.5 mW from a 1 V supply. The SRO-TDC occupies an active die area of only 0.02 mm2.

Original languageEnglish (US)
Article number6748928
Pages (from-to)1184-1197
Number of pages14
JournalIEEE Journal of Solid-State Circuits
Volume49
Issue number5
DOIs
StatePublished - May 2014

Keywords

  • CMOS digital integrated circuits
  • Calibration-free
  • SRO-TDC
  • TDC measurement techniques
  • digital phase-locked loops (DPLLs)
  • low power
  • noise-shaping time-to-digital converter (TDC)
  • oversampling
  • switched-ring oscillator (SRO)
  • two-frequency-switching TDC

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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