@inproceedings{9add03da3a5048bba3bc952164857e09,
title = "A Monte Carlo simulation environment for wear out in VLSI systems",
abstract = "The authors describe a simulation environment for reliability prediction of VLSI designs. Specifically, the effect of electromigration on the time-to-failure is investigated. The capabilities of the environment are illustrated with a case study of a microprocessor intended for control applications. The system under investigation is first simulated at the switch level and trace data on the switching activity is collected. This data is then used along with Monte Carlo simulation to model wear-out at the chip-level.",
keywords = "Reliability prediction, VLSI, device failure mechanism, electromigration, simulation, time-to-failure",
author = "Choi, {G. S.} and Iyer, {Ravishankar K} and Patel, {J. H.}",
note = "Publisher Copyright: {\textcopyright} 1991 IEEE.; 4th CSI/IEEE International Symposium on VLSI Design, VLSI 1991 ; Conference date: 04-01-1991 Through 08-01-1991",
year = "1991",
doi = "10.1109/ISVD.1991.185125",
language = "English (US)",
series = "Proceedings of the IEEE International Conference on VLSI Design",
publisher = "IEEE Computer Society",
pages = "249--254",
booktitle = "VLSI Design 1991 - Digest of Papers - 4th CSI/IEEE International Symposium on VLSI Design",
}