A Min-Cost Flow Based Detailed Router for FPGAs

Keyphrases

• Flow-based 100%
• Router 100%
• Min-cost Flow 100%
• Lagrangian 40%
• Routing Algorithm 40%
• Routing Problem 40%
• Lagrangian Relaxation 40%
• Flow Computation 40%
• Lagrangian multiplier 40%
• Network Flow 20%
• Challenging Problems 20%
• Cost Function 20%
• Flow Approach 20%
• Refinement Scheme 20%
• Routability 20%
• Minimizing Cost 20%
• FPGA-based 20%
• Congestion 20%
• FPGA Routing 20%
• Total Delay 20%
• Delay Cost 20%
• Network Flow Algorithms 20%
• Routing Delay 20%
• Free Routing 20%
• Iterative Refinement 20%
• Routing Solution 20%
• Ordering Problem 20%
• Routing Resources 20%
• Critical Path Delay 20%
• Logic Module 20%
• Detailed Routing 20%
• Congestion-free 20%
• Flow-based Routing 20%
• Common Logic 20%

Computer Science

• Routing Algorithm 100%
• Routing Problem 100%
• Lagrangian Relaxation 100%
• Lagrangian Multiplier 100%
• Iterative Refinement 50%
• Routing Solution 50%
• Routing Resource 50%
• Critical Path Delay 50%

Engineering

• Field Programmable Gate Arrays 100%
• Subproblem 50%
• Routing Problem 50%
• Lagrangian Relaxation 50%
• Routing Algorithm 50%
• Limitations 25%
• Nodes 25%
• Cost Function 25%
• Routing Solution 25%
• Critical Path 25%