TY - GEN
T1 - A low-latency, low-area hardware oblivious RAM controller
AU - Fletcher, Christopher W.
AU - Ren, Ling
AU - Kwon, Albert
AU - Van Dijk, Marten
AU - Stefanov, Emil
AU - Serpanos, Dimitrios
AU - Devadas, Srinivas
N1 - Publisher Copyright:
© 2015 IEEE.
PY - 2015/7/15
Y1 - 2015/7/15
N2 - We build and evaluate Tiny ORAM, an Oblivious RAM prototype on FPGA. Oblivious RAM is a cryptographic primitive that completely obfuscates an application's data, access pattern, and read/write behavior to/from external memory (such as DRAM or disk). Tiny ORAM makes two main contributions. First, by removing an algorithmic bottleneck in prior work, Tiny ORAM is the' first hardware ORAM design to support arbitrary block sizes (e.g., 64 Bytes to 4096 Bytes). With a 64 Byte block size, Tiny ORAM can ' finish an access in 1:4us, over 40x faster than the prior-art implementation. Second, through novel algorithmic and engineering-level optimizations, Tiny ORAM reduces the number of symmetric encryption operations by 3x compared to a prior work. Tiny ORAM is also the ' first design to implement and report real numbers for the cost of symmetric encryption in hardware ORAM constructions. Putting it together, Tiny ORAM requires 18381 (5%) LUTs and 146 (13%) Block RAM on a Xilinx XC7VX485T FPGA, including the cost of encryption.
AB - We build and evaluate Tiny ORAM, an Oblivious RAM prototype on FPGA. Oblivious RAM is a cryptographic primitive that completely obfuscates an application's data, access pattern, and read/write behavior to/from external memory (such as DRAM or disk). Tiny ORAM makes two main contributions. First, by removing an algorithmic bottleneck in prior work, Tiny ORAM is the' first hardware ORAM design to support arbitrary block sizes (e.g., 64 Bytes to 4096 Bytes). With a 64 Byte block size, Tiny ORAM can ' finish an access in 1:4us, over 40x faster than the prior-art implementation. Second, through novel algorithmic and engineering-level optimizations, Tiny ORAM reduces the number of symmetric encryption operations by 3x compared to a prior work. Tiny ORAM is also the ' first design to implement and report real numbers for the cost of symmetric encryption in hardware ORAM constructions. Putting it together, Tiny ORAM requires 18381 (5%) LUTs and 146 (13%) Block RAM on a Xilinx XC7VX485T FPGA, including the cost of encryption.
KW - Cryptographic Accelerator
KW - Oblivious RAM
KW - Storage System
UR - http://www.scopus.com/inward/record.url?scp=84943407214&partnerID=8YFLogxK
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U2 - 10.1109/FCCM.2015.58
DO - 10.1109/FCCM.2015.58
M3 - Conference contribution
AN - SCOPUS:84943407214
T3 - Proceedings - 2015 IEEE 23rd Annual International Symposium on Field-Programmable Custom Computing Machines, FCCM 2015
SP - 215
EP - 222
BT - Proceedings - 2015 IEEE 23rd Annual International Symposium on Field-Programmable Custom Computing Machines, FCCM 2015
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 23rd IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, FCCM 2015
Y2 - 3 May 2015 through 5 May 2015
ER -