A high-performance MPI implementation on a shared-memory vector supercomputer

William Gropp, Ewing Lusk

Research output: Contribution to journalArticlepeer-review

Abstract

In this article we recount the sequence of steps by which MPICH, a high-performance, portable implementation of the Message-Passing Interface (MPI) standard, was ported to the NEC SX-4, a high-performance parallel supercomputer. Each step in the sequence raised issues that are important for shared-memory programming in general and shed light on both MPICH and the SX-4. The result is a low-latency, very high bandwidth implementation of MPI for the NEC SX-4. In the process, MPICH was also improved in several general ways.

Original languageEnglish (US)
Pages (from-to)1513-1526
Number of pages14
JournalParallel Computing
Volume22
Issue number11
DOIs
StatePublished - Jan 1997
Externally publishedYes

Keywords

  • Implementation
  • MPICH
  • Message-Passing Interface
  • NEC SX-4
  • Performance
  • Shared-memory multiprocessor

ASJC Scopus subject areas

  • Software
  • Theoretical Computer Science
  • Hardware and Architecture
  • Computer Networks and Communications
  • Computer Graphics and Computer-Aided Design
  • Artificial Intelligence

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