Abstract
This paper presents a wide-band fractional-N frequency synthesizer for multi-standard cellular and short-range wireless communication receivers. The synthesizer covers the frequency band from 1.8 to 6 GHz and supports the standards of DCS1800, WCDMA, TD-SCDMA, WLAN802.11 a/b/g and Bluetooth. Architecture design and frequency planning are carefully performed to tradeoff wide frequency range and power efficiency. A quadrature voltage-controlled oscillator (QVCO) with a new phase shifter scheme is developed which shows better phase noise performance and more stable oscillation. Combining harmonic rejection and single sideband mixing, a harmonic-rejection SSBmixer (HR-SSBmixer) is developed to suppress unwanted sidebands and spurious signals. It serves as a power-saving solution to generate the LO signal for the 802.11a mode by avoiding power-hungry poly-phase filters or high-frequency LO buffers and dividers. The synthesizer is designed in a 0.13-μ m CMOS technology. It occupies an active area of 1.86 mm2 and consumes 35.6 to 52.62 mW of power. Measurement results show that the synthesizer is able to provide in-phase and quadrature-phase (I/Q) signals supporting the standards mentioned above.
Original language | English (US) |
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Article number | 5772989 |
Pages (from-to) | 1307-1320 |
Number of pages | 14 |
Journal | IEEE Journal of Solid-State Circuits |
Volume | 46 |
Issue number | 6 |
DOIs | |
State | Published - Jun 2011 |
Externally published | Yes |
Keywords
- Automatic frequency control
- QVCO
- frequency synthesizer
- harmonic rejection
- multi-standard wireless communication
- phase noise
- single sideband mixer
ASJC Scopus subject areas
- Electrical and Electronic Engineering