TY - GEN
T1 - A fault-tolerant hardware architecture for robust wearable heart rate monitoring
AU - Li, Qingkun
AU - Alemzadeh, Homa
AU - Kalbarczyk, Zbigniew T
AU - Iyer, Ravishankar K
N1 - Publisher Copyright:
© 2015 ICST.
PY - 2015/12/8
Y1 - 2015/12/8
N2 - This paper presents a fault-tolerant hardware architecture for robust wearable heart rate monitoring. The proposed architecture is designed for fusion of the heart rates estimated from both electrocardiogram (ECG) and arterial blood pressure (ABP) signals, with small hardware footprint and low energy consumption. It benefits from the following unique features: (1) an optimized heart beat (peak) detection algorithm that can be dynamically configured for either ECG or ABP analysis, resulting in about 38% reduction of the hardware footprint, (2) coarse-grained reconfigurable functional units (FUs) that can be programmed for different processing flows, and (3) a low overhead fault detection and recovery unit that enables dynamic recovery from transient hardware faults in the FUs. Both FPGA and ASIC prototypes of the proposed hardware have achieved much better performance and energy efficiency compared to an Android implementation of the same algorithm, and can recover from transient faults with low resource (∼15%) and energy (∼34%) overheads and no (0%) performance impact.
AB - This paper presents a fault-tolerant hardware architecture for robust wearable heart rate monitoring. The proposed architecture is designed for fusion of the heart rates estimated from both electrocardiogram (ECG) and arterial blood pressure (ABP) signals, with small hardware footprint and low energy consumption. It benefits from the following unique features: (1) an optimized heart beat (peak) detection algorithm that can be dynamically configured for either ECG or ABP analysis, resulting in about 38% reduction of the hardware footprint, (2) coarse-grained reconfigurable functional units (FUs) that can be programmed for different processing flows, and (3) a low overhead fault detection and recovery unit that enables dynamic recovery from transient hardware faults in the FUs. Both FPGA and ASIC prototypes of the proposed hardware have achieved much better performance and energy efficiency compared to an Android implementation of the same algorithm, and can recover from transient faults with low resource (∼15%) and energy (∼34%) overheads and no (0%) performance impact.
KW - biomedical monitoring
KW - fault tolerance
KW - heart rate monitor
KW - reconfigurable architectures
KW - wearable monitoring
UR - http://www.scopus.com/inward/record.url?scp=84963751072&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=84963751072&partnerID=8YFLogxK
U2 - 10.4108/icst.pervasivehealth.2015.259289
DO - 10.4108/icst.pervasivehealth.2015.259289
M3 - Conference contribution
AN - SCOPUS:84963751072
T3 - Proceedings of the 2015 9th International Conference on Pervasive Computing Technologies for Healthcare, PervasiveHealth 2015
SP - 185
EP - 192
BT - Proceedings of the 2015 9th International Conference on Pervasive Computing Technologies for Healthcare, PervasiveHealth 2015
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 9th International Conference on Pervasive Computing Technologies for Healthcare, PervasiveHealth 2015
Y2 - 20 May 2015 through 23 May 2015
ER -