A fast and accurate method for interconnect current calculation

Muzhou Shao, D. F. Wong, Youxin Gao, Huijing Cao, Li Pen Yuan

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

As VLSI technology continues to scale down, the electromigration problem has become one of the dominant factors in determining system reliability. This problem is caused by high current density flowing in the metal interconnect. Therefore, current evaluation is a crucial concern in IC design. SPICE level circuit simulators are excellent for doing current calculation; however, their running times are too expensive to be used repeatedly in design synthesis loops. In this paper, we propose an efficient approach for the interconnect current calculation. This method is based on moment matching but does not need high order moments. It only needs to traverse the RC tree once to get the mean current value of every segment, while traversing the tree once more is enough for the RMS current calculation, and two more traversals is sufficient for the peak current calculation. We apply our method to a larger number of interconnects getting close-to-SPICE accuracy at significantly faster runtimes. In particular, applying the method to 17,387 wire segments in the clock tree of a commercial IC, we obtained that the average deviation error of mean current is 0.0569%, average RMS current error is 0.703% and average peak current error is 6.552%. It took 28 hours for HSPICE to get the current value of all the wire segments and it only took our method 156 seconds.

Original languageEnglish (US)
Title of host publicationProceedings of the ASP-DAC 2003 Asia and South Pacific Design Automation Conference
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages37-42
Number of pages6
ISBN (Electronic)0780376595
DOIs
StatePublished - Jan 1 2003
EventAsia and South Pacific Design Automation Conference, ASP-DAC 2003 - Kitakyushu, Japan
Duration: Jan 21 2003Jan 24 2003

Publication series

NameProceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC
Volume2003-January

Other

OtherAsia and South Pacific Design Automation Conference, ASP-DAC 2003
CountryJapan
CityKitakyushu
Period1/21/031/24/03

ASJC Scopus subject areas

  • Computer Science Applications
  • Computer Graphics and Computer-Aided Design
  • Electrical and Electronic Engineering

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    Shao, M., Wong, D. F., Gao, Y., Cao, H., & Yuan, L. P. (2003). A fast and accurate method for interconnect current calculation. In Proceedings of the ASP-DAC 2003 Asia and South Pacific Design Automation Conference (pp. 37-42). [1194990] (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC; Vol. 2003-January). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ASPDAC.2003.1194990