TY - GEN
T1 - A domain decomposition method for the finite element simulation of circuit board interconnects
AU - Mao, Kaiyu
AU - Tan, Juin
AU - Jin, Jian Ming
PY - 2007
Y1 - 2007
N2 - A domain decomposition method (DDM) is developed to improve the efficiency of the finite element simulation of interconnects on multilayered printed circuit boards, which helps reduce memory requirements and CPU time without sacrificing the final accuracy. It takes advantage of the multilayered structure and decomposes the board into several single layers separated by power or ground planes. The simulation of each layer can be carried out independently. Connections between neighboring layers are realized by small holes ("vias"), whose computation is accomplished in a trivial final combination procedure. The total memory requirement is only related to the largest single layer. The CPU time is also found to be less than that of the full board simulation. This domain decomposition method further permits a convenient and practical way for parallel computation.
AB - A domain decomposition method (DDM) is developed to improve the efficiency of the finite element simulation of interconnects on multilayered printed circuit boards, which helps reduce memory requirements and CPU time without sacrificing the final accuracy. It takes advantage of the multilayered structure and decomposes the board into several single layers separated by power or ground planes. The simulation of each layer can be carried out independently. Connections between neighboring layers are realized by small holes ("vias"), whose computation is accomplished in a trivial final combination procedure. The total memory requirement is only related to the largest single layer. The CPU time is also found to be less than that of the full board simulation. This domain decomposition method further permits a convenient and practical way for parallel computation.
UR - http://www.scopus.com/inward/record.url?scp=47949121412&partnerID=8YFLogxK
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U2 - 10.1109/EPEP.2007.4387181
DO - 10.1109/EPEP.2007.4387181
M3 - Conference contribution
AN - SCOPUS:47949121412
SN - 1424408830
SN - 9781424408832
T3 - IEEE Topical Meeting on Electrical Performance of Electronic Packaging
SP - 279
EP - 282
BT - IEEE 16th Topical Meeting on Electrical Performance of Electronic Packaging, EPEP
T2 - IEEE 16th Topical Meeting on Electrical Performance of Electronic Packaging, EPEP
Y2 - 29 October 2007 through 31 October 2007
ER -