Abstract
The first continuous-time input pipeline Nyquist rate ADC architecture with inherent anti-alias filtering is introduced. Such an approach overcomes many of the challenges associated with a pure switched-capacitor architecture. Inherent anti-alias filtering is implemented in the first stage MDAC using first order Sinc filtering and a simple RC filter, allowing the possibility of eliminating costly anti-alias filters. The effect of switched-capacitor sampling distortion is reduced. This architecture also eases the jitter requirements of the ADC clock when compared to switched capacitor pipeline ADCs. 9.85 ENOB is achieved with 21.4mW analog power from a 1.8V supply at 26MSPS in a 0.18μm CMOS process.
Original language | English (US) |
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Title of host publication | 2009 IEEE Custom Integrated Circuits Conference, CICC '09 |
Pages | 275-278 |
Number of pages | 4 |
DOIs | |
State | Published - 2009 |
Externally published | Yes |
Event | 2009 IEEE Custom Integrated Circuits Conference, CICC '09 - San Jose, CA, United States Duration: Sep 13 2009 → Sep 16 2009 |
Other
Other | 2009 IEEE Custom Integrated Circuits Conference, CICC '09 |
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Country/Territory | United States |
City | San Jose, CA |
Period | 9/13/09 → 9/16/09 |
ASJC Scopus subject areas
- Electrical and Electronic Engineering