A continuous-time input pipeline ADC

David Gubbins, Bumha Lee, Pavan Kumar Hanumolu, Un Ku Moon

Research output: Contribution to journalArticlepeer-review

Abstract

A new pipeline ADC architecture that employs a continuous-time first stage followed by a conventional switched capacitor pipeline ADC is presented. Such an approach overcomes many of the challenges associated with a pure switched-capacitor architecture and leads to a low area, low power solution with excellent distortion performance. Measured results obtained from a proof of concept test chip fabricated in a 0.18/μm CMOS process validate the effectiveness of proposed techniques.

Original languageEnglish (US)
Article number4672050
Pages (from-to)169-172
Number of pages4
JournalProceedings of the Custom Integrated Circuits Conference
DOIs
StatePublished - 2008
Externally publishedYes

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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