A Bus-Oriented Multiprocessor Fast Fourier Transform

Douglas L. Jones, Henrik V. Sorensen

Research output: Contribution to journalArticle

Abstract

A bus-oriented multiprocessor architecture specialized for computation of the discrete Fourier transform (DFT) of a length N = 2″ sequential data stream is developed. The architecture distributes computation and memory requirements evenly among the processors and allows flexibility in the number of processors and in the choice of a fast Fourier transform (FFT) algorithm. With three busses, the bus bandwidth equals the input data rate. A single time-multiplexed bus with a bandwidth of three times the input data rate can alternatively be used. The architecture requires processors that have identical hardware, which makes it more attractive than the cascade (pipeline) FFT for multiprocessor implementation.

Original languageEnglish (US)
Pages (from-to)2547-2552
Number of pages6
JournalIEEE Transactions on Signal Processing
Volume39
Issue number11
DOIs
StatePublished - Nov 1991

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Fast Fourier transforms
Bandwidth
Discrete Fourier transforms
Pipelines
Hardware
Data storage equipment

ASJC Scopus subject areas

  • Signal Processing
  • Electrical and Electronic Engineering

Cite this

A Bus-Oriented Multiprocessor Fast Fourier Transform. / Jones, Douglas L.; Sorensen, Henrik V.

In: IEEE Transactions on Signal Processing, Vol. 39, No. 11, 11.1991, p. 2547-2552.

Research output: Contribution to journalArticle

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