TY - GEN
T1 - A 75dB DR 50MHz BW 3rd order CT-ΔΣ modulator using VCO-based integrators
AU - Young, Brian
AU - Reddy, Karthik
AU - Rao, Sachin
AU - Elshazly, Amr
AU - Anand, Tejasvi
AU - Hanumolu, Pavan Kumar
PY - 2014
Y1 - 2014
N2 - A wide bandwidth, high sample rate 3rd order continuous-time ΔΣ modulator using VCO-based integrators is presented. Non-idealities caused by VCOs at the modulator frontend are addressed using both circuit-and architecture-level techniques. Fabricated in 65nm CMOS, the prototype modulator operates at 1.28GS/s and achieves a dynamic range of 75dB, SNR of 71dB in 50MHz bandwidth, while consuming 38mW of total power.
AB - A wide bandwidth, high sample rate 3rd order continuous-time ΔΣ modulator using VCO-based integrators is presented. Non-idealities caused by VCOs at the modulator frontend are addressed using both circuit-and architecture-level techniques. Fabricated in 65nm CMOS, the prototype modulator operates at 1.28GS/s and achieves a dynamic range of 75dB, SNR of 71dB in 50MHz bandwidth, while consuming 38mW of total power.
UR - http://www.scopus.com/inward/record.url?scp=84905641301&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=84905641301&partnerID=8YFLogxK
U2 - 10.1109/VLSIC.2014.6858395
DO - 10.1109/VLSIC.2014.6858395
M3 - Conference contribution
AN - SCOPUS:84905641301
SN - 9781479933273
T3 - IEEE Symposium on VLSI Circuits, Digest of Technical Papers
BT - 2014 Symposium on VLSI Circuits, VLSIC 2014 - Digest of Technical Papers
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 28th IEEE Symposium on VLSI Circuits, VLSIC 2014
Y2 - 10 June 2014 through 13 June 2014
ER -