A 75dB DR 50MHz BW 3rd order CT-ΔΣ modulator using VCO-based integrators

Brian Young, Karthik Reddy, Sachin Rao, Amr Elshazly, Tejasvi Anand, Pavan Kumar Hanumolu

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

A wide bandwidth, high sample rate 3rd order continuous-time ΔΣ modulator using VCO-based integrators is presented. Non-idealities caused by VCOs at the modulator frontend are addressed using both circuit-and architecture-level techniques. Fabricated in 65nm CMOS, the prototype modulator operates at 1.28GS/s and achieves a dynamic range of 75dB, SNR of 71dB in 50MHz bandwidth, while consuming 38mW of total power.

Original languageEnglish (US)
Title of host publication2014 Symposium on VLSI Circuits, VLSIC 2014 - Digest of Technical Papers
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Print)9781479933273
DOIs
StatePublished - Jan 1 2014
Event28th IEEE Symposium on VLSI Circuits, VLSIC 2014 - Honolulu, HI, United States
Duration: Jun 10 2014Jun 13 2014

Publication series

NameIEEE Symposium on VLSI Circuits, Digest of Technical Papers

Other

Other28th IEEE Symposium on VLSI Circuits, VLSIC 2014
CountryUnited States
CityHonolulu, HI
Period6/10/146/13/14

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

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